Pavona Software APIs
flash_ctrl.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_FLASH_CTRL_H_
8#define OPENTITAN_DT_FLASH_CTRL_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP flash_ctrl and top egret.
17 *
18 * This file contains the type definitions and global functions of the flash_ctrl.
19 */
20
21#include "hw/top/dt/api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_flash_ctrl {
30 kDtFlashCtrlFirst = 0, /**< First instance */
31 kDtFlashCtrl = 0, /**< flash_ctrl */
33
34enum {
35 kDtFlashCtrlCount = 1, /**< Number of instances */
36};
37
38
39/**
40 * List of register blocks.
41 *
42 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
43 */
45 kDtFlashCtrlRegBlockCore = 0, /**< */
47
48enum {
49 kDtFlashCtrlRegBlockCount = 1, /**< Number of register blocks */
50};
51
52
53/** Primary register block (associated with the "primary" set of registers that control the IP). */
54static const dt_flash_ctrl_reg_block_t kDtFlashCtrlRegBlockPrimary = kDtFlashCtrlRegBlockCore;
55
56/**
57 * List of memories.
58 *
59 * Memories are guaranteed to start at 0 and to be consecutively numbered.
60 */
62 kDtFlashCtrlMemoryMem = 0, /**< */
64
65enum {
66 kDtFlashCtrlMemoryCount = 1, /**< Number of memories */
67};
68
69
70/**
71 * List of IRQs.
72 *
73 * IRQs are guaranteed to be numbered consecutively from 0.
74 */
75typedef enum dt_flash_ctrl_irq {
76 kDtFlashCtrlIrqProgEmpty = 0, /**< Program FIFO empty */
77 kDtFlashCtrlIrqProgLvl = 1, /**< Program FIFO drained to level */
78 kDtFlashCtrlIrqRdFull = 2, /**< Read FIFO full */
79 kDtFlashCtrlIrqRdLvl = 3, /**< Read FIFO filled to level */
80 kDtFlashCtrlIrqOpDone = 4, /**< Operation complete */
81 kDtFlashCtrlIrqCorrErr = 5, /**< Correctable error encountered */
83
84enum {
85 kDtFlashCtrlIrqCount = 6, /**< Number of IRQs */
86};
87
88
89/**
90 * List of Alerts.
91 *
92 * Alerts are guaranteed to be numbered consecutively from 0.
93 */
94typedef enum dt_flash_ctrl_alert {
95 kDtFlashCtrlAlertRecovErr = 0, /**< flash recoverable errors */
96 kDtFlashCtrlAlertFatalStdErr = 1, /**< flash standard fatal errors */
97 kDtFlashCtrlAlertFatalErr = 2, /**< Flash fatal errors including uncorrectable ECC errors.
98
99 Note that this alert is not always fatal.
100 The underlying error bits in the !!FAULT_STATUS register remain set until reset, meaning the alert keeps firing.
101 This doesn't hold for !!FAULT_STATUS.PHY_RELBL_ERR and !!FAULT_STATUS.PHY_STORAGE_ERR.
102 To enable firmware dealing with multi-bit ECC and ICV errors during firmware selection and verification, these error bits can be cleared.
103 After passing this stage, it is recommended that firmware classifies the corresponding alert as fatal on the receiver end, i.e, inside the alert handler. */
104 kDtFlashCtrlAlertFatalPrimFlashAlert = 3, /**< Fatal alert triggered inside the flash primitive, including fatal TL-UL bus integrity faults of the test interface. */
105 kDtFlashCtrlAlertRecovPrimFlashAlert = 4, /**< Recoverable alert triggered inside the flash primitive. */
107
108enum {
109 kDtFlashCtrlAlertCount = 5, /**< Number of Alerts */
110};
111
112
113/**
114 * List of clock ports.
115 *
116 * Clock ports are guaranteed to be numbered consecutively from 0.
117 */
119 kDtFlashCtrlClockClk = 0, /**< Clock port clk_i */
120 kDtFlashCtrlClockOtp = 1, /**< Clock port clk_otp_i */
122
123enum {
124 kDtFlashCtrlClockCount = 2, /**< Number of clock ports */
125};
126
127
128/**
129 * List of reset ports.
130 *
131 * Reset ports are guaranteed to be numbered consecutively from 0.
132 */
134 kDtFlashCtrlResetRst = 0, /**< Reset port rst_ni */
135 kDtFlashCtrlResetOtp = 1, /**< Reset port rst_otp_ni */
137
138enum {
139 kDtFlashCtrlResetCount = 2, /**< Number of reset ports */
140};
141
142
143/**
144 * List of supported hardware features.
145 */
146#define OPENTITAN_FLASH_CTRL_HAS_ESCALATION 1
147#define OPENTITAN_FLASH_CTRL_HAS_FETCH_CODE 1
148#define OPENTITAN_FLASH_CTRL_HAS_INFO_CREATOR_PARTITION 1
149#define OPENTITAN_FLASH_CTRL_HAS_INFO_ISOLATED_PARTITION 1
150#define OPENTITAN_FLASH_CTRL_HAS_INFO_OWNER_PARTITION 1
151#define OPENTITAN_FLASH_CTRL_HAS_INIT_ROOT_SEEDS 1
152#define OPENTITAN_FLASH_CTRL_HAS_INIT_SCRAMBLING_KEYS 1
153#define OPENTITAN_FLASH_CTRL_HAS_MEM_PROTECTION 1
154#define OPENTITAN_FLASH_CTRL_HAS_OP_HOST_READ 1
155#define OPENTITAN_FLASH_CTRL_HAS_OP_PROTOCOL_CTRL 1
156#define OPENTITAN_FLASH_CTRL_HAS_RMA 1
157
158
159
160/**
161 * Get the flash_ctrl instance from an instance ID
162 *
163 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
164 *
165 * @param inst_id Instance ID.
166 * @return A flash_ctrl instance.
167 *
168 * **Note:** This function only makes sense if the instance ID has device type flash_ctrl,
169 * otherwise the returned value is unspecified.
170 */
172
173/**
174 * Get the instance ID of an instance.
175 *
176 * @param dt Instance of flash_ctrl.
177 * @return The instance ID of that instance.
178 */
180
181/**
182 * Get the register base address of an instance.
183 *
184 * @param dt Instance of flash_ctrl.
185 * @param reg_block The register block requested.
186 * @return The register base address of the requested block.
187 */
190 dt_flash_ctrl_reg_block_t reg_block);
191
192/**
193 * Get the primary register base address of an instance.
194 *
195 * This is just a convenience function, equivalent to
196 * `dt_flash_ctrl_reg_block(dt, kDtFlashCtrlRegBlockCore)`
197 *
198 * @param dt Instance of flash_ctrl.
199 * @return The register base address of the primary register block.
200 */
201static inline uint32_t dt_flash_ctrl_primary_reg_block(
202 dt_flash_ctrl_t dt) {
203 return dt_flash_ctrl_reg_block(dt, kDtFlashCtrlRegBlockCore);
204}
205
206/**
207 * Get the base address of a memory.
208 *
209 * @param dt Instance of flash_ctrl.
210 * @param mem The memory requested.
211 * @return The base address of the requested memory.
212 */
216
217/**
218 * Get the size of a memory.
219 *
220 * @param dt Instance of flash_ctrl.
221 * @param mem The memory requested.
222 * @return The size of the requested memory.
223 */
227
228/**
229 * Get the PLIC ID of a flash_ctrl IRQ for a given instance.
230 *
231 * If the instance is not connected to the PLIC, this function
232 * will return `kDtPlicIrqIdNone`.
233 *
234 * @param dt Instance of flash_ctrl.
235 * @param irq A flash_ctrl IRQ.
236 * @return The PLIC ID of the IRQ of this instance.
237 */
241
242/**
243 * Convert a global IRQ ID to a local flash_ctrl IRQ type.
244 *
245 * @param dt Instance of flash_ctrl.
246 * @param irq A PLIC ID that belongs to this instance.
247 * @return The flash_ctrl IRQ, or `kDtFlashCtrlIrqCount`.
248 *
249 * **Note:** This function assumes that the PLIC ID belongs to the instance
250 * of flash_ctrl passed in parameter. In other words, it must be the case that
251 * `dt_flash_ctrl_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
252 * will return `kDtFlashCtrlIrqCount`.
253 */
256 dt_plic_irq_id_t irq);
257
258
259/**
260 * Get the alert ID of a flash_ctrl alert for a given instance.
261 *
262 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
263 * instances where the instance is not connected, the return value is unspecified.
264 *
265 * @param dt Instance of flash_ctrl.
266 * @param alert A flash_ctrl alert.
267 * @return The Alert Handler alert ID of the alert of this instance.
268 */
272
273/**
274 * Convert a global alert ID to a local flash_ctrl alert type.
275 *
276 * @param dt Instance of flash_ctrl.
277 * @param alert A global alert ID that belongs to this instance.
278 * @return The flash_ctrl alert, or `kDtFlashCtrlAlertCount`.
279 *
280 * **Note:** This function assumes that the global alert ID belongs to the
281 * instance of flash_ctrl passed in parameter. In other words, it must be the case
282 * that `dt_flash_ctrl_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
283 * this function will return `kDtFlashCtrlAlertCount`.
284 */
287 dt_alert_id_t alert);
288
289
290
291/**
292 * Get the clock signal connected to a clock port of an instance.
293 *
294 * @param dt Instance of flash_ctrl.
295 * @param clk Clock port.
296 * @return Clock signal.
297 */
301
302/**
303 * Get the reset signal connected to a reset port of an instance.
304 *
305 * @param dt Instance of flash_ctrl.
306 * @param rst Reset port.
307 * @return Reset signal.
308 */
312
313
314
315#ifdef __cplusplus
316} // extern "C"
317#endif // __cplusplus
318
319#endif // OPENTITAN_DT_FLASH_CTRL_H_