Pavona Software APIs
flash_ctrl.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_FLASH_CTRL_H_
8#define OPENTITAN_DT_FLASH_CTRL_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP flash_ctrl and top scafi_deprecated.
17 *
18 * This file contains the type definitions and global functions of the flash_ctrl.
19 */
20
21#include "hw/top/dt/api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_flash_ctrl {
30 kDtFlashCtrlFirst = 0, /**< First instance */
31 kDtFlashCtrl = 0, /**< flash_ctrl */
33
34enum {
35 kDtFlashCtrlCount = 1, /**< Number of instances */
36};
37
38
39/**
40 * List of register blocks.
41 *
42 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
43 */
45 kDtFlashCtrlRegBlockCore = 0, /**< */
47
48enum {
49 kDtFlashCtrlRegBlockCount = 1, /**< Number of register blocks */
50};
51
52
53/** Primary register block (associated with the "primary" set of registers that control the IP). */
54static const dt_flash_ctrl_reg_block_t kDtFlashCtrlRegBlockPrimary = kDtFlashCtrlRegBlockCore;
55
56/**
57 * List of memories.
58 *
59 * Memories are guaranteed to start at 0 and to be consecutively numbered.
60 */
62 kDtFlashCtrlMemoryMem = 0, /**< */
64
65enum {
66 kDtFlashCtrlMemoryCount = 1, /**< Number of memories */
67};
68
69
70/**
71 * List of IRQs.
72 *
73 * IRQs are guaranteed to be numbered consecutively from 0.
74 */
75typedef enum dt_flash_ctrl_irq {
76 kDtFlashCtrlIrqProgEmpty = 0, /**< Program FIFO empty */
77 kDtFlashCtrlIrqProgLvl = 1, /**< Program FIFO drained to level */
78 kDtFlashCtrlIrqRdFull = 2, /**< Read FIFO full */
79 kDtFlashCtrlIrqRdLvl = 3, /**< Read FIFO filled to level */
80 kDtFlashCtrlIrqOpDone = 4, /**< Operation complete */
81 kDtFlashCtrlIrqCorrErr = 5, /**< Correctable error encountered */
83
84enum {
85 kDtFlashCtrlIrqCount = 6, /**< Number of IRQs */
86};
87
88
89/**
90 * List of clock ports.
91 *
92 * Clock ports are guaranteed to be numbered consecutively from 0.
93 */
94typedef enum dt_flash_ctrl_clock {
95 kDtFlashCtrlClockClk = 0, /**< Clock port clk_i */
96 kDtFlashCtrlClockOtp = 1, /**< Clock port clk_otp_i */
98
99enum {
100 kDtFlashCtrlClockCount = 2, /**< Number of clock ports */
101};
102
103
104/**
105 * List of reset ports.
106 *
107 * Reset ports are guaranteed to be numbered consecutively from 0.
108 */
110 kDtFlashCtrlResetRst = 0, /**< Reset port rst_ni */
111 kDtFlashCtrlResetOtp = 1, /**< Reset port rst_otp_ni */
113
114enum {
115 kDtFlashCtrlResetCount = 2, /**< Number of reset ports */
116};
117
118
119/**
120 * List of supported hardware features.
121 */
122#define OPENTITAN_FLASH_CTRL_HAS_ESCALATION 1
123#define OPENTITAN_FLASH_CTRL_HAS_FETCH_CODE 1
124#define OPENTITAN_FLASH_CTRL_HAS_INFO_CREATOR_PARTITION 1
125#define OPENTITAN_FLASH_CTRL_HAS_INFO_ISOLATED_PARTITION 1
126#define OPENTITAN_FLASH_CTRL_HAS_INFO_OWNER_PARTITION 1
127#define OPENTITAN_FLASH_CTRL_HAS_INIT_ROOT_SEEDS 1
128#define OPENTITAN_FLASH_CTRL_HAS_INIT_SCRAMBLING_KEYS 1
129#define OPENTITAN_FLASH_CTRL_HAS_MEM_PROTECTION 1
130#define OPENTITAN_FLASH_CTRL_HAS_OP_HOST_READ 1
131#define OPENTITAN_FLASH_CTRL_HAS_OP_PROTOCOL_CTRL 1
132#define OPENTITAN_FLASH_CTRL_HAS_RMA 1
133
134
135
136/**
137 * Get the flash_ctrl instance from an instance ID
138 *
139 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
140 *
141 * @param inst_id Instance ID.
142 * @return A flash_ctrl instance.
143 *
144 * **Note:** This function only makes sense if the instance ID has device type flash_ctrl,
145 * otherwise the returned value is unspecified.
146 */
148
149/**
150 * Get the instance ID of an instance.
151 *
152 * @param dt Instance of flash_ctrl.
153 * @return The instance ID of that instance.
154 */
156
157/**
158 * Get the register base address of an instance.
159 *
160 * @param dt Instance of flash_ctrl.
161 * @param reg_block The register block requested.
162 * @return The register base address of the requested block.
163 */
166 dt_flash_ctrl_reg_block_t reg_block);
167
168/**
169 * Get the primary register base address of an instance.
170 *
171 * This is just a convenience function, equivalent to
172 * `dt_flash_ctrl_reg_block(dt, kDtFlashCtrlRegBlockCore)`
173 *
174 * @param dt Instance of flash_ctrl.
175 * @return The register base address of the primary register block.
176 */
177static inline uint32_t dt_flash_ctrl_primary_reg_block(
178 dt_flash_ctrl_t dt) {
179 return dt_flash_ctrl_reg_block(dt, kDtFlashCtrlRegBlockCore);
180}
181
182/**
183 * Get the base address of a memory.
184 *
185 * @param dt Instance of flash_ctrl.
186 * @param mem The memory requested.
187 * @return The base address of the requested memory.
188 */
192
193/**
194 * Get the size of a memory.
195 *
196 * @param dt Instance of flash_ctrl.
197 * @param mem The memory requested.
198 * @return The size of the requested memory.
199 */
203
204/**
205 * Get the PLIC ID of a flash_ctrl IRQ for a given instance.
206 *
207 * If the instance is not connected to the PLIC, this function
208 * will return `kDtPlicIrqIdNone`.
209 *
210 * @param dt Instance of flash_ctrl.
211 * @param irq A flash_ctrl IRQ.
212 * @return The PLIC ID of the IRQ of this instance.
213 */
217
218/**
219 * Convert a global IRQ ID to a local flash_ctrl IRQ type.
220 *
221 * @param dt Instance of flash_ctrl.
222 * @param irq A PLIC ID that belongs to this instance.
223 * @return The flash_ctrl IRQ, or `kDtFlashCtrlIrqCount`.
224 *
225 * **Note:** This function assumes that the PLIC ID belongs to the instance
226 * of flash_ctrl passed in parameter. In other words, it must be the case that
227 * `dt_flash_ctrl_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
228 * will return `kDtFlashCtrlIrqCount`.
229 */
232 dt_plic_irq_id_t irq);
233
234
235
236
237/**
238 * Get the clock signal connected to a clock port of an instance.
239 *
240 * @param dt Instance of flash_ctrl.
241 * @param clk Clock port.
242 * @return Clock signal.
243 */
247
248/**
249 * Get the reset signal connected to a reset port of an instance.
250 *
251 * @param dt Instance of flash_ctrl.
252 * @param rst Reset port.
253 * @return Reset signal.
254 */
258
259
260
261#ifdef __cplusplus
262} // extern "C"
263#endif // __cplusplus
264
265#endif // OPENTITAN_DT_FLASH_CTRL_H_