device_sim_verilator.c

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// Copyright lowRISC contributors (OpenTitan project).
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
 
#include <assert.h>
#include <stdbool.h>
 
#include "hw/top/dt/rv_core_ibex.h"
#include "sw/device/lib/arch/device.h"
 
#include "hw/top/rv_core_ibex_regs.h"
 
// Use the first dt_rv_core_ibex_t enum, i.e. the first Ibex core instance.
static const dt_rv_core_ibex_t kRvCoreIbexDt = (dt_rv_core_ibex_t)0;
static_assert(kDtRvCoreIbexCount == 1, "Only single core tops are supported");
 
static inline uintptr_t rv_core_ibex_base(void) {
  return (uintptr_t)dt_rv_core_ibex_primary_reg_block(kRvCoreIbexDt);
}
 
/**
 * @file
 * @brief Device-specific symbol definitions for the Verilator device.
 */
 
const device_type_t kDeviceType = kDeviceSimVerilator;
 
// Changes to the clock frequency or UART baud rate must also be reflected at
// `hw/top_egret/rtl/chip_egret_verilator.sv` and
// `test/systemtest/egret/test_sim_verilator.py`.
#define CPU_FREQ_HZ 500 * 1000
const uint64_t kClockFreqCpuHz = CPU_FREQ_HZ;  // 500kHz
 
// This function is specific for the frequency above. Notice since the cycle
// time is 2 us we round up.
uint64_t to_cpu_cycles(uint64_t usec) {
  static_assert(CPU_FREQ_HZ == 500 * 1000,
                "The verilator to_cpu_cycles function needs refactoring.");
  return (usec + 1) / 2;
}
 
const uint64_t kClockFreqHiSpeedPeripheralHz = 500 * 1000;  // 500kHz
 
// Egret on Verilator uses a 1/4 clock divider for the peripheral clock, but on
// Dragonfly the peripheral clock is 1:1 with the high-speed domain clock.
#if defined(PAVONA_IS_EGRET)
const uint64_t kClockFreqPeripheralHz =
    kClockFreqHiSpeedPeripheralHz / 4;  // 125kHz
#elif defined(PAVONA_IS_DRAGONFLY)
const uint64_t kClockFreqPeripheralHz =
    kClockFreqHiSpeedPeripheralHz;  // 500kHz
#endif
 
const uint64_t kClockFreqUsbHz = 500 * 1000;  // 500kHz
 
const uint64_t kClockFreqAonHz = 125 * 1000;  // 125kHz
 
const uint64_t kUartBaudrate = 7200;
 
const uint32_t kUartNCOValue =
    CALCULATE_UART_NCO(kUartBaudrate, kClockFreqPeripheralHz);
 
const uint32_t kUartBaud115K =
    CALCULATE_UART_NCO(115200, kClockFreqPeripheralHz);
const uint32_t kUartBaud230K =
    CALCULATE_UART_NCO(115200 * 2, kClockFreqPeripheralHz);
const uint32_t kUartBaud460K =
    CALCULATE_UART_NCO(115200 * 4, kClockFreqPeripheralHz);
const uint32_t kUartBaud921K =
    CALCULATE_UART_NCO(115200 * 8, kClockFreqPeripheralHz);
const uint32_t kUartBaud1M33 =
    CALCULATE_UART_NCO(1333333, kClockFreqPeripheralHz);
const uint32_t kUartBaud1M50 =
    CALCULATE_UART_NCO(1500000, kClockFreqPeripheralHz);
 
const uint32_t kAstCheckPollCpuCycles =
    CALCULATE_AST_CHECK_POLL_CPU_CYCLES(kClockFreqCpuHz);
 
uintptr_t device_test_status_address(void) {
  return rv_core_ibex_base() + RV_CORE_IBEX_DV_SIM_WINDOW_REG_OFFSET;
}
 
uintptr_t device_log_bypass_uart_address(void) { return 0; }