This IP was configured with the following parameters:
| name | value | dtgen |
|---|---|---|
| clk_freqs | OrderedDict([(‘aon’, 62500000), (‘io’, 250000000), (‘main’, 1000000000)]) | |
| reqs | OrderedDict([(‘int’, [OrderedDict([(‘name’, ‘MainPwr’), (‘desc’, ‘main power glitch reset request’), (‘module’, ‘pwrmgr_aon’)]), OrderedDict([(‘name’, ‘Esc’), (‘desc’, ‘escalation reset request’), (‘module’, ‘alert_handler’)])]), (‘debug’, [OrderedDict([(‘name’, ‘Ndm’), (‘desc’, ‘non-debug-module reset request’), (‘module’, ‘rv_dm’)])]), (‘peripheral’, [OrderedDict([(‘name’, ‘aon_timer_rst_req’), (‘width’, ‘1’), (‘module’, ‘aon_timer_aon’), (‘desc’, ‘Watchdog reset request.’), (‘enabled_after_reset’, False)]), OrderedDict([(‘name’, ‘rst_req_external’), (‘width’, ‘1’), (‘module’, ‘soc_proxy’), (‘desc’, ‘External reset request’), (‘enabled_after_reset’, True)])])]) | |
| power_domains | [‘Aon’, ‘0’] | |
| num_rstreqs | 2 | |
| sw_rsts | OrderedDict([(‘spi_device’, ‘io’), (‘spi_host0’, ‘io’), (‘i2c0’, ‘io’)]) | |
| output_rsts | [OrderedDict([(‘name’, ‘por_aon’), (‘gen’, False), (‘type’, ‘top’), (‘domains’, [‘0’, ‘Aon’]), (‘shadowed’, False), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_por_aon_n’), (‘clock’, ‘aon’)]), OrderedDict([(‘name’, ‘por’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘Aon’]), (‘shadowed’, False), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_por_n’), (‘parent’, ‘por_aon’), (‘clock’, ‘main’)]), OrderedDict([(‘name’, ‘por_io’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘Aon’]), (‘shadowed’, False), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_por_io_n’), (‘parent’, ‘por_aon’), (‘clock’, ‘io’)]), OrderedDict([(‘name’, ‘lc’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’, ‘Aon’]), (‘shadowed’, True), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_lc_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘main’)]), OrderedDict([(‘name’, ‘lc_aon’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘Aon’]), (‘shadowed’, False), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_lc_aon_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘aon’)]), OrderedDict([(‘name’, ‘lc_io’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’, ‘Aon’]), (‘shadowed’, True), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_lc_io_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘io’)]), OrderedDict([(‘name’, ‘sys’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’]), (‘shadowed’, False), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_sys_n’), (‘parent’, ‘sys_src’), (‘clock’, ‘main’)]), OrderedDict([(‘name’, ‘spi_device’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’]), (‘shadowed’, False), (‘sw’, True), (‘path’, ‘rstmgr_aon_resets.rst_spi_device_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘io’)]), OrderedDict([(‘name’, ‘spi_host0’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’]), (‘shadowed’, False), (‘sw’, True), (‘path’, ‘rstmgr_aon_resets.rst_spi_host0_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘io’)]), OrderedDict([(‘name’, ‘i2c0’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’]), (‘shadowed’, False), (‘sw’, True), (‘path’, ‘rstmgr_aon_resets.rst_i2c0_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘io’)])] | |
| leaf_rsts | [OrderedDict([(‘name’, ‘por’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘Aon’]), (‘shadowed’, False), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_por_n’), (‘parent’, ‘por_aon’), (‘clock’, ‘main’)]), OrderedDict([(‘name’, ‘por_io’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘Aon’]), (‘shadowed’, False), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_por_io_n’), (‘parent’, ‘por_aon’), (‘clock’, ‘io’)]), OrderedDict([(‘name’, ‘lc’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’, ‘Aon’]), (‘shadowed’, True), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_lc_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘main’)]), OrderedDict([(‘name’, ‘lc_aon’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘Aon’]), (‘shadowed’, False), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_lc_aon_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘aon’)]), OrderedDict([(‘name’, ‘lc_io’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’, ‘Aon’]), (‘shadowed’, True), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_lc_io_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘io’)]), OrderedDict([(‘name’, ‘sys’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’]), (‘shadowed’, False), (‘sw’, False), (‘path’, ‘rstmgr_aon_resets.rst_sys_n’), (‘parent’, ‘sys_src’), (‘clock’, ‘main’)]), OrderedDict([(‘name’, ‘spi_device’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’]), (‘shadowed’, False), (‘sw’, True), (‘path’, ‘rstmgr_aon_resets.rst_spi_device_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘io’)]), OrderedDict([(‘name’, ‘spi_host0’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’]), (‘shadowed’, False), (‘sw’, True), (‘path’, ‘rstmgr_aon_resets.rst_spi_host0_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘io’)]), OrderedDict([(‘name’, ‘i2c0’), (‘gen’, True), (‘type’, ‘top’), (‘domains’, [‘0’]), (‘shadowed’, False), (‘sw’, True), (‘path’, ‘rstmgr_aon_resets.rst_i2c0_n’), (‘parent’, ‘lc_src’), (‘clock’, ‘io’)])] | |
| rst_ni | lc_io | |
| export_rsts | OrderedDict() | |
| with_alert_handler | True | |
| topname | dragonfly | |
| uniquified_modules | OrderedDict() | |
| module_instance_name | rstmgr |