This IP was configured with the following parameters:

namevaluedtgen
otp_mmapOrderedDict([(‘otp’, OrderedDict([(‘width’, 2), (‘depth’, 1024), (‘size’, 2048), (‘addr_width’, 10), (‘byte_addr_width’, 11)])), (‘scrambling’, OrderedDict([(‘key_size’, 16), (‘iv_size’, 8), (‘cnst_size’, 16), (‘keys’, [OrderedDict([(‘name’, ‘Secret0Key’), (‘value’, ‘’)]), OrderedDict([(‘name’, ‘Secret1Key’), (‘value’, ‘’)]), OrderedDict([(‘name’, ‘Secret2Key’), (‘value’, ‘’)])]), (‘digests’, [OrderedDict([(‘name’, ‘CnstyDigest’), (‘iv_value’, ‘’), (‘cnst_value’, ‘’)]), OrderedDict([(‘name’, ‘FlashDataKey’), (‘iv_value’, ‘’), (‘cnst_value’, ‘’)]), OrderedDict([(‘name’, ‘FlashAddrKey’), (‘iv_value’, ‘’), (‘cnst_value’, ‘’)]), OrderedDict([(‘name’, ‘SramDataKey’), (‘iv_value’, ‘’), (‘cnst_value’, ‘’)])]), (‘num_keys’, 3), (‘num_digests’, 4)])), (‘partitions’, [OrderedDict([(‘name’, ‘VENDOR_TEST’), (‘variant’, ‘Unbuffered’), (‘secret’, False), (‘sw_digest’, True), (‘hw_digest’, False), (‘write_lock’, ‘Digest’), (‘read_lock’, ‘CSR’), (‘key_sel’, ‘NoKey’), (‘integrity’, False), (‘bkout_type’, False), (‘skip_sw_header’, True), (‘items’, [OrderedDict([(‘name’, ‘SCRATCH’), (‘size’, 56), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 0)]), OrderedDict([(‘name’, ‘VENDOR_TEST_DIGEST’), (‘size’, 8), (‘offset’, 56), (‘ismubi’, False), (‘isdigest’, True), (‘iszer’, False), (‘inv_default’, ‘’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False)])]), (‘desc’, ‘Vendor test partition.\nThis is reserved for manufacturing smoke checks. The OTP wrapper\ncontrol logic inside otp_macro is allowed to read/write to this\nregion. ECC uncorrectable errors seen on the functional otp_macro\ninterface will not lead to an alert for this partition.\nInstead, such errors will be reported as correctable ECC errors.’), (‘absorb’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘ignore_read_lock_in_rma’, False), (‘size’, 64), (‘offset’, 0)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG’), (‘variant’, ‘Unbuffered’), (‘absorb’, True), (‘secret’, False), (‘sw_digest’, True), (‘hw_digest’, False), (‘write_lock’, ‘Digest’), (‘read_lock’, ‘CSR’), (‘key_sel’, ‘NoKey’), (‘integrity’, True), (‘bkout_type’, False), (‘items’, [OrderedDict([(‘name’, ‘CREATOR_SW_CFG_AST_CFG’), (‘size’, 156), (‘desc’, ‘AST configuration data. These values get blindly copied to\nthe AST CSRs during ROM execution.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 64)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_AST_INIT_EN’), (‘size’, 4), (‘desc’, ‘Controls whether or not the CREATOR_SW_CFG_AST_CFG values\nget copied to the AST CSRs during ROM execution.\nA value of kMultiBitBool4True enables copying; all other\nvalues disable.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 220)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_ROM_EXT_SKU’), (‘size’, 4), (‘desc’, ‘SKU identifier metadata. Unused by SiliconCreator software.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 224)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_SIGVERIFY_SPX_EN’), (‘size’, 4), (‘desc’, ‘Controls whether or not SPHINCS+ signature verification will\nbe executed when the ROM attempts to boot the ROM_EXT.\nA value of kSigverifySpxDisabledOtp disables SPHINCS+\nsignature verification, while all other values enable it.\nNote, SPHINCS+ signature verification is always disabled in\nTEST_UNLOCKED* LC states.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 228)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG’), (‘size’, 4), (‘desc’, ‘The default scrambling, ECC, and high endurance\nconfiguration settings for flash data pages set during ROM\nexecution.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 232)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG’), (‘size’, 4), (‘desc’, ‘The scrambling, ECC, and high endurance configuration\nsettings for the boot data flash info pages set during ROM\nexecution.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 236)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_FLASH_HW_INFO_CFG_OVERRIDE’), (‘size’, 4), (‘desc’, ‘Scrambling and ECC configuration overrides (set by the ROM)\nfor the Creator and OwnerSeed flash info pages (pages 1 and\n2 in partition 0) that are hardwired to the keygmr. By\ndefault, scrambling and ECC on these flash info pages must\nbe enabled in order to successfully crank the keygmr (in the\nROM_EXT). However, values of kMultiBitBool4True for each\nsubfield in this field will disable this requirement. See\nthe HW_INFO_CFG_OVERRIDE flash_ctrl CSR for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 240)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_EN’), (‘size’, 4), (‘desc’, ‘Whether or not to enable use of hardware generated entropy\n(from the entropy complex via EDN) in the rnd_uint32\nfunction. A value of kHardenedBoolTrue enables the use of\nhardware generated entropy, while all other values disable.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 244)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_JITTER_EN’), (‘size’, 4), (‘desc’, ‘Whether or not to enable clock jitter. A value of\nkMultiBitBool4False disables, while all other values enable.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 248)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RET_RAM_RESET_MASK’), (‘size’, 4), (‘desc’, ‘Reset reason mask used to initialize (by overwriting with\nrandom data) retention SRAM during ROM execution. A value of\n0 only initializes retention SRAM on power-on-resets.See\nrstmgr RESET_INFO CSR documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 252)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_MANUF_STATE’), (‘size’, 4), (‘desc’, ‘Manufacturing state binding field. For use by\nSiliconCreators or SiliconOwners to bind ROM_EXT images to a\nspecific device or set of devices.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 256)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_ROM_EXEC_EN’), (‘size’, 4), (‘desc’, ‘Whether or not to enable execution of ROM. A value of 0\ndisables, while all other values enable. This enables\nprovisioning flows to attach JTAG connections and halt the\nCPU before the device has been fully provisioned. All SKUs\nshould set this field to a non-zero value. Provisioning\nflows shall take care to program this field at the\nappropriate time during.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 260)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_CPUCTRL’), (‘size’, 4), (‘desc’, ‘Value to write to the Ibex CPUCTRL CSR during ROM execution.\nThis field controls settings such as ICACHE enablement. See\nIbex documentation for more information.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 264)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_MIN_SEC_VER_ROM_EXT’), (‘size’, 4), (‘desc’, ‘Value of the min_security_version_rom_ext field of the\ndefault boot data.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 268)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_MIN_SEC_VER_BL0’), (‘size’, 4), (‘desc’, ‘Value of the min_security_version_bl0 field of the\ndefault boot data.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 272)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_DEFAULT_BOOT_DATA_IN_PROD_EN’), (‘size’, 4), (‘desc’, ‘Whether or not to enable the default boot data in PROD and\nPROD_END life cycle states. A value of kHardenedBoolTrue\nenables, all other values disable. If left disabled,\nprovisioning flows are required to setup boot data pages\nprior to enabling ROM execution. The default personalization\nflow in ft_personalize.c configures these pages.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 276)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RMA_SPIN_EN’), (‘size’, 4), (‘desc’, ‘Whether or not to enable a busy-wait delay loop in the ROM,\nwhen a specific SW strapping configuration is applied during\nboot, to provide time to trigger an RMA lifecycle transition\nover JTAG. A value of kHardenedBoolTrue enables, all other\nvalues disable.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 280)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RMA_SPIN_CYCLES’), (‘size’, 4), (‘desc’, ‘The number of Ibex clock cycles to spin for when waiting for\nan RMA transition. Used in combination with the\nCREATOR_SW_CFG_RMA_SPIN_EN field.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 284)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_REPCNT_THRESHOLDS’), (‘size’, 4), (‘desc’, ‘The repetition count health test thresholds to enable\nentropy_src with during ROM execution.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 288)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_REPCNTS_THRESHOLDS’), (‘size’, 4), (‘desc’, ‘The repetition count symbol health test thresholds to enable\nentropy_src with during ROM execution.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 292)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_ADAPTP_HI_THRESHOLDS’), (‘size’, 4), (‘desc’, ‘The adaptive proportion health test high thresholds to\nenable entropy_src with during ROM execution.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 296)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_ADAPTP_LO_THRESHOLDS’), (‘size’, 4), (‘desc’, ‘The adaptive proportion health test low thresholds to enable\nentropy_src with during ROM execution.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 300)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_BUCKET_THRESHOLDS’), (‘size’, 4), (‘desc’, ‘The bucket health test thresholds to enable entropy_src with\nduring ROM execution.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 304)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_MARKOV_HI_THRESHOLDS’), (‘size’, 4), (‘desc’, ‘The Markov health test high thresholds to enable entropy_src\nwith during ROM execution.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 308)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_MARKOV_LO_THRESHOLDS’), (‘size’, 4), (‘desc’, ‘The Markov health test low thresholds to enable entropy_src\nwith during ROM execution.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 312)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_EXTHT_HI_THRESHOLDS’), (‘size’, 4), (‘desc’, ‘The external health test high thresholds to enable the\nentropy_src with during ROM execution.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 316)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_EXTHT_LO_THRESHOLDS’), (‘size’, 4), (‘desc’, ‘The external health test low thresholds to enable the\nentropy_src with during ROM execution.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 320)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_ALERT_THRESHOLD’), (‘size’, 4), (‘desc’, ‘The alert threshold to configure the entropy_src with during\nROM execution.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 324)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RNG_HEALTH_CONFIG_DIGEST’), (‘size’, 4), (‘desc’, ‘A CRC32 digest of all entropy_src health test threshold\nconfiguration fields above.\nThis must be configured if CREATOR_SW_CFG_RNG_EN is true.\nSee entropy_src documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 328)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_SRAM_KEY_RENEW_AND_INIT_EN’), (‘size’, 4), (‘desc’, ‘Whether or not the ROM should request SRAM to be rescrambled\nwith a new key on every boot. This includes renewing the\nscrambling key and then initializing SRAM with pseudo-random\ndata. kHardenedBoolFalse disables, while all other values\nenable.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 332)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN’), (‘size’, 4), (‘desc’, ‘Enablement of the ROM_EXT immutable code section.\nA value of kHardenedBoolTrue enables the feature.\nAll other values disable it.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 336)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_START_OFFSET’), (‘size’, 4), (‘desc’, ‘Relative offset from the start of the ROM_EXT slot to\nfind the immutable code section at.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 340)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_LENGTH’), (‘size’, 4), (‘desc’, ‘Length (in bytes) of the immutable code section.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 344)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_SHA256_HASH’), (‘size’, 32), (‘desc’, ‘SHA256 hash of the immutable ROM_EXT section.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 348)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_RESERVED’), (‘size’, 32), (‘desc’, ‘Unused bits in the CREATOR_SW_CFG OTP partition. These can\nbe claimed by software as needed.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 380)]), OrderedDict([(‘name’, ‘CREATOR_SW_CFG_DIGEST’), (‘size’, 8), (‘offset’, 424), (‘ismubi’, False), (‘isdigest’, True), (‘iszer’, False), (‘inv_default’, ‘’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False)])]), (‘desc’, ‘Software configuration partition.\nThis is for device-specific calibration data, e.g, clock, LDO, RNG,\nand configuration settings set by the ROM.’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘ignore_read_lock_in_rma’, False), (‘size’, 368), (‘offset’, 64)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG’), (‘variant’, ‘Unbuffered’), (‘absorb’, True), (‘secret’, False), (‘sw_digest’, True), (‘hw_digest’, False), (‘write_lock’, ‘Digest’), (‘read_lock’, ‘CSR’), (‘key_sel’, ‘NoKey’), (‘integrity’, True), (‘bkout_type’, False), (‘items’, [OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_ERROR_REPORTING’), (‘size’, 4), (‘desc’, ‘The shutdown error reporting verbosity used by the ROM.\nShould be configured to one of several\nshutdown_error_redact_t values. See\nsw/device/silicon_creator/lib/shutdown.h for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 432)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_BOOTSTRAP_DIS’), (‘size’, 4), (‘desc’, ‘Whether or not to disable ROM bootstrap mechanism. A value\nof kHardenedBoolTrue disable bootstrap mechanism in the ROM,\nwhile all other values enable it. Note, the provisioning\nflow should take care when to program this field if it is\nused by a SKU, as there is no way to get firmware into flash\nin a PROD LC state if a valid ROM_EXT does not already exist\nin flash once this value is configured to true.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 436)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_ALERT_CLASS_EN’), (‘size’, 4), (‘desc’, ‘A four byte packed field, where each byte controls whether\nor not the ROM enables each alert class (A through D) of the\nalert_handler. The byte-sized subfields are arranged from D\nto A, MSB to LSB. Each byte should be set to an\nalert_enable_t value accordingly. See the alert_handler\ndocumentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 440)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_ALERT_ESCALATION’), (‘size’, 4), (‘desc’, ‘A four byte packed field, where each byte controls the\nescalation configuration for each alert class (A through D)\nof the alert_handler configured by the ROM. The byte-sized\nsubfields are arranged from D to A, MSB to LSB. Each byte\nshould be set to an alert_escalate_t value accordingly.\nSee the alert_handler documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 444)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_ALERT_CLASSIFICATION’), (‘size’, 320), (‘desc’, ‘The alert classifications (A through D) for each alert\nsource of the alert_handler to be configured by the ROM. The\nfield consists of a contiguous 320-byte block, or 80 32-bit\nwords. The four bytes in each word encode the configuration\nof a single alert source across four lifecycle states, in\norder from LSB to MSB: PROD, PROD_END, DEV, and RMA. Each\nbyte should be set to an alert_class_t value accordingly.\nThe order of the 80 32-bit words, from LSB to MSB can be\nfound in the EGRET_ALERTS list in rules/const.bzl.\nSee the alert_handler documentation for more details.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 448)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_LOCAL_ALERT_CLASSIFICATION’), (‘size’, 64), (‘desc’, ‘Same as the OWNER_SW_CFG_ROM_ALERT_CLASSIFICATION field,\nexcept these configuration correspond to the local alert\nsources found in the EGRET_LOC_ALERTS list in\nrules/const.bzl.'), ('isdigest', False), ('iszer', False), ('ismubi', False), ('iskeymgr_creator', False), ('iskeymgr_owner', False), ('absorb', False), ('inv_default', 0), ('offset', 768)]), OrderedDict([('name', 'OWNER_SW_CFG_ROM_ALERT_ACCUM_THRESH'), ('size', 16), ('desc', 'The alert accumulation threshold values for each alert class\n(A through D) of the alert_handler to be configured by the\nROM. This field consists of four 32-bit words encoding the\naccumulation thresholds for each alert class A through D\narranged LSW to MSW. See the alert_handler documentation for\nmore details.'), ('isdigest', False), ('iszer', False), ('ismubi', False), ('iskeymgr_creator', False), ('iskeymgr_owner', False), ('absorb', False), ('inv_default', 0), ('offset', 832)]), OrderedDict([('name', 'OWNER_SW_CFG_ROM_ALERT_TIMEOUT_CYCLES'), ('size', 16), ('desc', 'Same as the OWNER_SW_CFG_ROM_ALERT_ACCUM_THRESHfield,\nexcept each value corresponds to the interrupt timeout\nconfiguration of an alert class.'), ('isdigest', False), ('iszer', False), ('ismubi', False), ('iskeymgr_creator', False), ('iskeymgr_owner', False), ('absorb', False), ('inv_default', 0), ('offset', 848)]), OrderedDict([('name', 'OWNER_SW_CFG_ROM_ALERT_PHASE_CYCLES'), ('size', 64), ('desc', 'The alert escalation phase durations, measured in clock\ncycles, the ROM will configure the four alert phases for\neach alert class of the alert_handler. This field consists\nof a contiguous 64-byte block, or an array of four 128-bit\nfields. Each 128-bit subfield encodes four 32-bit words that\ncontain the alert phase cycle count configurations for alert\nescalation phases 0 to 3, from LSW to MSW. Each 128-bit\nsubfield is contains all configurations for a single alert\nclass, arranged from class A to D, from LS to MS. For\nexample, the cycle durations of each escalation phase in\nthis field should be configured as such, from LSB to MSB:\n<classA,phase0>...<classA,phase3>...<classD,phase0>...\n<classD,phase3>. See the alert_handler documentation for\nmore details.'), ('isdigest', False), ('iszer', False), ('ismubi', False), ('iskeymgr_creator', False), ('iskeymgr_owner', False), ('absorb', False), ('inv_default', 0), ('offset', 864)]), OrderedDict([('name', 'OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD'), ('size', 4), ('desc', 'The expected CRC32 digest over all of the alert_handler\nconfigurations set up by the ROM for a device operating in\nthe PROD LC state. The ROM reads this field and checks it\nagainst a digest it computes over the alert_handler\nconfiguration it programmed. This field is expected to be\nautomatically computed by theotp_alert_digest()Bazel\nrule. See thealert_config_crc32()function in the\nSiliconCreator alert_handler driver for more details on what\nconfigurations are included in this digest.'), ('isdigest', False), ('iszer', False), ('ismubi', False), ('iskeymgr_creator', False), ('iskeymgr_owner', False), ('absorb', False), ('inv_default', 0), ('offset', 928)]), OrderedDict([('name', 'OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD_END'), ('size', 4), ('desc', 'Same as theOWNER_SW_CFG_ROM_ALERT_DIGEST_PRODfield,\nexcept the expected digest is for chips operating in the\nPROD_END LC state.'), ('isdigest', False), ('iszer', False), ('ismubi', False), ('iskeymgr_creator', False), ('iskeymgr_owner', False), ('absorb', False), ('inv_default', 0), ('offset', 932)]), OrderedDict([('name', 'OWNER_SW_CFG_ROM_ALERT_DIGEST_DEV'), ('size', 4), ('desc', 'Same as theOWNER_SW_CFG_ROM_ALERT_DIGEST_PRODfield,\nexcept the expected digest is for chips operating in the\nDEV LC state.'), ('isdigest', False), ('iszer', False), ('ismubi', False), ('iskeymgr_creator', False), ('iskeymgr_owner', False), ('absorb', False), ('inv_default', 0), ('offset', 936)]), OrderedDict([('name', 'OWNER_SW_CFG_ROM_ALERT_DIGEST_RMA'), ('size', 4), ('desc', 'Same as theOWNER_SW_CFG_ROM_ALERT_DIGEST_PROD` field,\nexcept the expected digest is for chips operating in the\nRMA LC state.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 940)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_WATCHDOG_BITE_THRESHOLD_CYCLES’), (‘size’, 4), (‘desc’, ‘Watchdog timer bite threshold (in cycles) configured by the ROM.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 944)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_KEYMGR_OTP_MEAS_EN’), (‘size’, 4), (‘desc’, ‘Whether or not to configure the attestation SW binding CSRs\nof the keymgr with the value in ROM_EXT manifest or the\nmeasurement of the OTP CreatorSwCfg, OwnerSwCfg, and\nsecure boot key integrity digest. A value of\nkHardenedBoolTrue uses the ROM computed OTP measurements,\nwhile all other values trigger the use of the binding values\nincluded in the ROM_EXT manifest.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 948)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_MANUF_STATE’), (‘size’, 4), (‘desc’, ‘Manufacturing state binding field. For use by\nSiliconCreators or SiliconOwners to bind BL0 images to a\nspecific device or set of devices.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 952)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_RSTMGR_INFO_EN’), (‘size’, 4), (‘desc’, “A two byte packed word that indicates the expected rstmgr\nalert and CPU info dump enable states, configured in the\nrstmgr’s ALERT_INFO_CTRL and CPU_INFO_CTRL CSRs respectively.\nThe expected format of this fields is\n{0,0,kHardenedBool*,kHardenedBool*}, read MSB to LSB, where\nthe left most kHardenedBool* entry indicates the expected\nenablement state of the ALERT_INFO_CTRL, and the right most\nindicates the enablement state of the CPU_INFO_CTRL. Since\nthe ROM expects both to be disabled upon handing over\nexecution control to the ROM_EXT, this entire OTP field\nshould be left unprovisioned, or set to all 0.”), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 956)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_EXT_BOOTSTRAP_EN’), (‘size’, 4), (‘desc’, ‘Unused. Set to 0.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 960)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_SENSOR_CTRL_ALERT_CFG’), (‘size’, 12), (‘desc’, ‘Alert configuration values for the sensor_ctrl block\nthat will be configured by the ROM. This field is 12 bytes\nlong, where each byte contains two 4-bit packed subfields,\nencoding two four bit boolean values (kMultiBitBool4False or\nkMultiBitBool4True), as follows (read MSB to LSB):\n{fatality, enablement}. For example, the byte 0x69 would\nencode the alert is: 1) recoverable, and 2) disabled.\n\nCurrently, there are only 11 alerts in sensor_ctrl to\nconfigure, thus only the least significant bytes in this\nfield are used.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 964)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_SRAM_READBACK_EN’), (‘size’, 4), (‘desc’, ‘This field encodes the enablements of the readback security\nfeatures for the main and retention SRAMs to be configured\nby the ROM. This field is four bytes, but the LSB contains\ntwo 4-bit packed kMultiBitBool4* values that indicate the\nenablement of the feature for the retention SRAM and\nmain SRAM, from MSB to LSB respectively. See the READBACK\nCSR of the sram_ctrl for more details on this feature.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 976)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_PRESERVE_RESET_REASON_EN’), (‘size’, 4), (‘desc’, ‘Whether or not the ROM should preserve the reset reasons CSR\nstate in the rstmgr, or clear it. A value of\nkHardenedBoolTrue preserves the CSR, while other values\ntrigger the ROM to clear the CSR after copying the reason to\nthe retention SRAM.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 980)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_RESET_REASON_CHECK_VALUE’), (‘size’, 4), (‘desc’, ‘Two packed 16-bit values that indicate whether the ROM\nshould perform a validation check on the the reset reasons\nduring boot. The validation check is a hardening mechanism\nthat checks the reset reasons for consistency at two\ndifferent points in time. Both packed values should be the\nsame. Values of kHardenedBoolFalse will instruct the ROM to\nskip the reset reasons validation check, while all other\nvalues will instruct the ROM to perform the check.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 984)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_BANNER_EN’), (‘size’, 4), (‘desc’, ‘Whether or not the ROM should print a banner message to the\nconsole UART during boot. A value of kHardenedBoolFalse\ndisables the message printing, while all other values enable\nit.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 988)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_ROM_FLASH_ECC_EXC_HANDLER_EN’), (‘size’, 4), (‘desc’, ‘Whether or not the ROM should use the flash ECC exception\nhandler during execution. A value of kHardenedBoolTrue\nallows the ROM to use an the exception handler that recovers\ngracefully and continues the boot process if a flash ECC\nerror is encountered during verification of a specific\nROM_EXT slot. This enables the ROM to attempt booting the\nnext ROM_EXT slot if the first slot attempted has been\ncorrupted. All other values trigger default ROM exception\nhandling, which is all exceptions trigger a chip shutdown\nand reset.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 992)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_RESERVED’), (‘size’, 128), (‘desc’, ‘Unused bits in the OWNER_SW_CFG OTP partition. These can be\nclaimed by software as needed.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 996)]), OrderedDict([(‘name’, ‘OWNER_SW_CFG_DIGEST’), (‘size’, 8), (‘offset’, 1136), (‘ismubi’, False), (‘isdigest’, True), (‘iszer’, False), (‘inv_default’, ‘’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False)])]), (‘desc’, ‘Software configuration partition.\nThis contains data that changes software behavior in the ROM, for\nexample enabling defensive features in ROM or selecting failure\nmodes if verification fails.’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘ignore_read_lock_in_rma’, False), (‘size’, 712), (‘offset’, 432)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN’), (‘variant’, ‘Unbuffered’), (‘absorb’, False), (‘secret’, False), (‘sw_digest’, True), (‘hw_digest’, False), (‘write_lock’, ‘Digest’), (‘read_lock’, ‘CSR’), (‘key_sel’, ‘NoKey’), (‘integrity’, True), (‘bkout_type’, False), (‘items’, [OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE0’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1144)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY0’), (‘size’, 64), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1148)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE1’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1212)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY1’), (‘size’, 64), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1216)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE2’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1280)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY2’), (‘size’, 64), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1284)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE3’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1348)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY3’), (‘size’, 64), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1352)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE0’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1416)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY0’), (‘size’, 32), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1420)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG0’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1452)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE1’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1456)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY1’), (‘size’, 32), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1460)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG1’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1492)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE2’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1496)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY2’), (‘size’, 32), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1500)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG2’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1532)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE3’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1536)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY3’), (‘size’, 32), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1540)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG3’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1572)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_BLOCK_SHA2_256_HASH’), (‘size’, 32), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1576)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_CODESIGN_DIGEST’), (‘size’, 8), (‘offset’, 1608), (‘ismubi’, False), (‘isdigest’, True), (‘iszer’, False), (‘inv_default’, ‘’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False)])]), (‘desc’, ‘This OTP partition is used to store four P-256 keys\nand four Sphincs+ keys. The partition requires 464\nbytes of software visible storage. The partition is\nlocked at manufacturing time to protect against\nmalicious write attempts.’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘ignore_read_lock_in_rma’, False), (‘size’, 472), (‘offset’, 1144)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_STATE’), (‘variant’, ‘Unbuffered’), (‘absorb’, False), (‘secret’, False), (‘sw_digest’, True), (‘hw_digest’, False), (‘write_lock’, ‘Digest’), (‘read_lock’, ‘CSR’), (‘key_sel’, ‘NoKey’), (‘integrity’, True), (‘bkout_type’, False), (‘items’, [OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_STATE_ECDSA_KEY0’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1616)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_STATE_ECDSA_KEY1’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1620)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_STATE_ECDSA_KEY2’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1624)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_STATE_ECDSA_KEY3’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1628)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_STATE_SPX_KEY0’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1632)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_STATE_SPX_KEY1’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1636)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_STATE_SPX_KEY2’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1640)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_STATE_SPX_KEY3’), (‘size’, 4), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘inv_default’, 0), (‘offset’, 1644)]), OrderedDict([(‘name’, ‘ROT_CREATOR_AUTH_STATE_DIGEST’), (‘size’, 8), (‘offset’, 1648), (‘ismubi’, False), (‘isdigest’, True), (‘iszer’, False), (‘inv_default’, ‘’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False)])]), (‘desc’, ‘This OTP partition is used to capture the state of\neach key slot. Each key can be in one of the\nfollowing states: BLANK, ENABLED, DISABLED. The\nencoded values are such that transitions between\nBLANK -> ENABLED -> DISABLED are possible without\ncausing ECC errors (this is a mechanism similar to\nhow we manage life cycle state transitions). The\npartition is left unlocked to allow STATE updates in\nthe field. The ROM_EXT is required to lock access to\nthe OTP Direct Access Interface to prevent DoS\nattacks from malicious code executing on Silicon\nOwner partitions. DAI write locking is available in\nEgret.’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘ignore_read_lock_in_rma’, False), (‘size’, 40), (‘offset’, 1616)]), OrderedDict([(‘name’, ‘HW_CFG0’), (‘variant’, ‘Buffered’), (‘secret’, False), (‘sw_digest’, False), (‘hw_digest’, True), (‘write_lock’, ‘Digest’), (‘read_lock’, ‘None’), (‘key_sel’, ‘NoKey’), (‘integrity’, True), (‘bkout_type’, True), (‘skip_sw_header’, True), (‘items’, [OrderedDict([(‘name’, ‘DEVICE_ID’), (‘size’, 32), (‘inv_default’, ‘’), (‘desc’, ‘Unique device identifier that is always exposed through the\nlifecycle JTAG tap. See documentation on Device Identifiers.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1656)]), OrderedDict([(‘name’, ‘MANUF_STATE’), (‘size’, 32), (‘inv_default’, ‘’), (‘desc’, ‘Field to capture manufacturing status. Currently unused. Set\nto 0.’), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1688)]), OrderedDict([(‘name’, ‘HW_CFG0_DIGEST’), (‘size’, 8), (‘offset’, 1720), (‘ismubi’, False), (‘isdigest’, True), (‘iszer’, False), (‘inv_default’, ‘’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False)])]), (‘desc’, ‘Hardware configuration 0 partition.\nThis contains a device identifier and manufacturing state.’), (‘absorb’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘ignore_read_lock_in_rma’, False), (‘size’, 72), (‘offset’, 1656)]), OrderedDict([(‘name’, ‘HW_CFG1’), (‘variant’, ‘Buffered’), (‘secret’, False), (‘sw_digest’, False), (‘hw_digest’, True), (‘write_lock’, ‘Digest’), (‘read_lock’, ‘None’), (‘key_sel’, ‘NoKey’), (‘integrity’, True), (‘bkout_type’, True), (‘skip_sw_header’, True), (‘items’, [OrderedDict([(‘name’, ‘EN_SRAM_IFETCH’), (‘size’, 1), (‘ismubi’, True), (‘inv_default’, ‘’), (‘desc’, ‘Enablement of execute from SRAM switch in the sram_ctrl (see\nEXEC CSR). A kMultiBitBool8True value enables, while all\nother values disable.’), (‘isdigest’, False), (‘iszer’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1728)]), OrderedDict([(‘name’, ‘EN_CSRNG_SW_APP_READ’), (‘size’, 1), (‘ismubi’, True), (‘inv_default’, ‘’), (‘desc’, ‘Enablement of CSRNG software application interface. A\nkMultiBitBool8True value enables, while all other values\ndisable. Enablement is required to extract output from\nCSRNG via software.’), (‘isdigest’, False), (‘iszer’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1729)]), OrderedDict([(‘name’, ‘DIS_RV_DM_LATE_DEBUG’), (‘size’, 1), (‘ismubi’, True), (‘inv_default’, ‘’), (‘desc’, ‘Disablement of RV_DM late debug feature (see rv_dm\ndocumentation). A kMultiBitBool8True disables the late debug\nfeature and renders the rv_dm fully ungated in DEV lifecycle\nstates. All other values gate rv_dm reachability based on\nthe value of LATE_DEBUG_ENABLE CSR in the rv_dm block.’), (‘isdigest’, False), (‘iszer’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1730)]), OrderedDict([(‘name’, ‘HW_CFG1_DIGEST’), (‘size’, 8), (‘offset’, 1736), (‘ismubi’, False), (‘isdigest’, True), (‘iszer’, False), (‘inv_default’, ‘’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False)])]), (‘desc’, ‘Hardware configuration 1 partition.\nThis contains several hardware feature switches.’), (‘absorb’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘ignore_read_lock_in_rma’, False), (‘size’, 16), (‘offset’, 1728)]), OrderedDict([(‘name’, ‘SECRET0’), (‘variant’, ‘Buffered’), (‘secret’, True), (‘sw_digest’, False), (‘hw_digest’, True), (‘write_lock’, ‘Digest’), (‘read_lock’, ‘Digest’), (‘ignore_read_lock_in_rma’, True), (‘key_sel’, ‘Secret0Key’), (‘integrity’, True), (‘bkout_type’, False), (‘skip_sw_header’, True), (‘items’, [OrderedDict([(‘name’, ‘TEST_UNLOCK_TOKEN’), (‘inv_default’, ‘’), (‘size’, 16), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1744)]), OrderedDict([(‘name’, ‘TEST_EXIT_TOKEN’), (‘inv_default’, ‘’), (‘size’, 16), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1760)]), OrderedDict([(‘name’, ‘SECRET0_DIGEST’), (‘size’, 8), (‘offset’, 1776), (‘ismubi’, False), (‘isdigest’, True), (‘iszer’, False), (‘inv_default’, ‘’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False)])]), (‘desc’, ‘Secret partition 0.\nThis contains TEST lifecycle unlock tokens.’), (‘absorb’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘size’, 40), (‘offset’, 1744)]), OrderedDict([(‘name’, ‘SECRET1’), (‘variant’, ‘Buffered’), (‘secret’, True), (‘sw_digest’, False), (‘hw_digest’, True), (‘write_lock’, ‘Digest’), (‘read_lock’, ‘Digest’), (‘ignore_read_lock_in_rma’, True), (‘key_sel’, ‘Secret1Key’), (‘integrity’, True), (‘bkout_type’, False), (‘skip_sw_header’, True), (‘items’, [OrderedDict([(‘name’, ‘FLASH_ADDR_KEY_SEED’), (‘inv_default’, ‘’), (‘size’, 32), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1784)]), OrderedDict([(‘name’, ‘FLASH_DATA_KEY_SEED’), (‘inv_default’, ‘’), (‘size’, 32), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1816)]), OrderedDict([(‘name’, ‘SRAM_DATA_KEY_SEED’), (‘inv_default’, ‘’), (‘size’, 16), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1848)]), OrderedDict([(‘name’, ‘SECRET1_DIGEST’), (‘size’, 8), (‘offset’, 1864), (‘ismubi’, False), (‘isdigest’, True), (‘iszer’, False), (‘inv_default’, ‘’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False)])]), (‘desc’, ‘Secret partition 1.\nThis contains SRAM and flash scrambling keys.’), (‘absorb’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘size’, 88), (‘offset’, 1784)]), OrderedDict([(‘name’, ‘SECRET2’), (‘variant’, ‘Buffered’), (‘secret’, True), (‘sw_digest’, False), (‘hw_digest’, True), (‘write_lock’, ‘Digest’), (‘read_lock’, ‘Digest’), (‘ignore_read_lock_in_rma’, True), (‘key_sel’, ‘Secret2Key’), (‘integrity’, True), (‘bkout_type’, False), (‘skip_sw_header’, True), (‘items’, [OrderedDict([(‘name’, ‘RMA_TOKEN’), (‘inv_default’, ‘’), (‘size’, 16), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1872)]), OrderedDict([(‘name’, ‘CREATOR_ROOT_KEY_SHARE0’), (‘inv_default’, ‘’), (‘size’, 32), (‘iskeymgr_creator’, True), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1888)]), OrderedDict([(‘name’, ‘CREATOR_ROOT_KEY_SHARE1’), (‘inv_default’, ‘’), (‘size’, 32), (‘iskeymgr_creator’, True), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1920)]), OrderedDict([(‘name’, ‘SECRET2_DIGEST’), (‘size’, 8), (‘offset’, 1952), (‘ismubi’, False), (‘isdigest’, True), (‘iszer’, False), (‘inv_default’, ‘’), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False)])]), (‘desc’, ‘Secret partition 2.\nThis contains RMA unlock token, creator root key, and creator seed.’), (‘absorb’, False), (‘iskeymgr_creator’, True), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘size’, 88), (‘offset’, 1872)]), OrderedDict([(‘name’, ‘LIFE_CYCLE’), (‘variant’, ‘LifeCycle’), (‘secret’, False), (‘sw_digest’, False), (‘hw_digest’, False), (‘write_lock’, ‘None’), (‘read_lock’, ‘None’), (‘key_sel’, ‘NoKey’), (‘integrity’, True), (‘bkout_type’, False), (‘skip_sw_header’, True), (‘items’, [OrderedDict([(‘name’, ‘LC_TRANSITION_CNT’), (‘inv_default’, ‘’), (‘size’, 48), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 1960)]), OrderedDict([(‘name’, ‘LC_STATE’), (‘inv_default’, ‘’), (‘size’, 40), (‘isdigest’, False), (‘iszer’, False), (‘ismubi’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘absorb’, False), (‘offset’, 2008)])]), (‘desc’, ‘Lifecycle partition.\nThis contains lifecycle transition count and state. This partition\ncannot be locked since the life cycle state needs to advance to RMA\nin-field. Note that while this partition is not marked secret, it\nis not readable nor writeable via the DAI. Only the LC controller\ncan access this partition, and even via the LC controller it is not\npossible to read the raw manufacturing life cycle state in encoded\nform, since that encoding is considered a netlist secret. The LC\ncontroller only exposes a decoded version of this state.’), (‘absorb’, False), (‘iskeymgr_creator’, False), (‘iskeymgr_owner’, False), (‘zeroizable’, False), (‘ignore_read_lock_in_rma’, False), (‘size’, 88), (‘offset’, 1960)])])])
enable_flash_keyTrue
topnameegret
uniquified_modulesOrderedDict()
module_instance_nameotp_ctrl