This IP was configured with the following parameters:

namevaluedtgen
clk_freqsOrderedDict({‘aon’: 200000, ‘io_div4’: 24000000, ‘main’: 100000000, ‘io’: 96000000, ‘io_div2’: 48000000, ‘usb’: 48000000})
reqsOrderedDict({‘int’: [OrderedDict({‘name’: ‘MainPwr’, ‘desc’: ‘main power glitch reset request’, ‘module’: ‘pwrmgr_aon’}), OrderedDict({‘name’: ‘Esc’, ‘desc’: ‘escalation reset request’, ‘module’: ‘alert_handler’})], ‘debug’: [OrderedDict({‘name’: ‘Ndm’, ‘desc’: ‘non-debug-module reset request’, ‘module’: ‘rv_dm’})], ‘peripheral’: [OrderedDict({‘name’: ‘rst_req’, ‘width’: ‘1’, ‘module’: ‘sysrst_ctrl_aon’, ‘desc’: ‘Reset request to rstmgr (running on AON clock).’, ‘enabled_after_reset’: False}), OrderedDict({‘name’: ‘aon_timer_rst_req’, ‘width’: ‘1’, ‘module’: ‘aon_timer_aon’, ‘desc’: ‘Watchdog reset request.’, ‘enabled_after_reset’: False})]})
power_domains[‘Aon’, ‘0’]
num_rstreqs2
sw_rstsOrderedDict({‘spi_device’: ‘io_div4’, ‘spi_host0’: ‘io’, ‘spi_host1’: ‘io_div2’, ‘usb’: ‘usb’, ‘usb_aon’: ‘aon’, ‘i2c0’: ‘io_div4’, ‘i2c1’: ‘io_div4’, ‘i2c2’: ‘io_div4’})
output_rsts[OrderedDict({‘name’: ‘por_aon’, ‘gen’: False, ‘type’: ‘top’, ‘domains’: [‘0’, ‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_aon_n’, ‘clock’: ‘aon’}), OrderedDict({‘name’: ‘por’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_n’, ‘parent’: ‘por_aon’, ‘clock’: ‘main’}), OrderedDict({‘name’: ‘por_io’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_io_n’, ‘parent’: ‘por_aon’, ‘clock’: ‘io’}), OrderedDict({‘name’: ‘por_io_div2’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_io_div2_n’, ‘parent’: ‘por_aon’, ‘clock’: ‘io_div2’}), OrderedDict({‘name’: ‘por_io_div4’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_io_div4_n’, ‘parent’: ‘por_aon’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘por_usb’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_usb_n’, ‘parent’: ‘por_aon’, ‘clock’: ‘usb’}), OrderedDict({‘name’: ‘lc’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’, ‘Aon’], ‘shadowed’: True, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘main’}), OrderedDict({‘name’: ‘lc_aon’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_aon_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘aon’}), OrderedDict({‘name’: ‘lc_io’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’, ‘0’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_io_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io’}), OrderedDict({‘name’: ‘lc_io_div2’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’, ‘0’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_io_div2_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div2’}), OrderedDict({‘name’: ‘lc_io_div4’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’, ‘Aon’], ‘shadowed’: True, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_io_div4_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘lc_usb’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’, ‘0’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_usb_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘usb’}), OrderedDict({‘name’: ‘sys’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_sys_n’, ‘parent’: ‘sys_src’, ‘clock’: ‘main’}), OrderedDict({‘name’: ‘sys_io_div4’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_sys_io_div4_n’, ‘parent’: ‘sys_src’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘spi_device’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_spi_device_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘spi_host0’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_spi_host0_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io’}), OrderedDict({‘name’: ‘spi_host1’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_spi_host1_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div2’}), OrderedDict({‘name’: ‘usb’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_usb_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘usb’}), OrderedDict({‘name’: ‘usb_aon’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_usb_aon_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘aon’}), OrderedDict({‘name’: ‘i2c0’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_i2c0_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘i2c1’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_i2c1_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘i2c2’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_i2c2_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div4’})]
leaf_rsts[OrderedDict({‘name’: ‘por’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_n’, ‘parent’: ‘por_aon’, ‘clock’: ‘main’}), OrderedDict({‘name’: ‘por_io’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_io_n’, ‘parent’: ‘por_aon’, ‘clock’: ‘io’}), OrderedDict({‘name’: ‘por_io_div2’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_io_div2_n’, ‘parent’: ‘por_aon’, ‘clock’: ‘io_div2’}), OrderedDict({‘name’: ‘por_io_div4’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_io_div4_n’, ‘parent’: ‘por_aon’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘por_usb’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_por_usb_n’, ‘parent’: ‘por_aon’, ‘clock’: ‘usb’}), OrderedDict({‘name’: ‘lc’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’, ‘Aon’], ‘shadowed’: True, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘main’}), OrderedDict({‘name’: ‘lc_aon’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_aon_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘aon’}), OrderedDict({‘name’: ‘lc_io’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’, ‘0’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_io_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io’}), OrderedDict({‘name’: ‘lc_io_div2’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’, ‘0’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_io_div2_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div2’}), OrderedDict({‘name’: ‘lc_io_div4’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’, ‘Aon’], ‘shadowed’: True, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_io_div4_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘lc_usb’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’, ‘0’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_lc_usb_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘usb’}), OrderedDict({‘name’: ‘sys’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_sys_n’, ‘parent’: ‘sys_src’, ‘clock’: ‘main’}), OrderedDict({‘name’: ‘sys_io_div4’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘Aon’], ‘shadowed’: False, ‘sw’: False, ‘path’: ‘rstmgr_aon_resets.rst_sys_io_div4_n’, ‘parent’: ‘sys_src’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘spi_device’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_spi_device_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘spi_host0’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_spi_host0_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io’}), OrderedDict({‘name’: ‘spi_host1’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_spi_host1_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div2’}), OrderedDict({‘name’: ‘usb’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_usb_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘usb’}), OrderedDict({‘name’: ‘usb_aon’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_usb_aon_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘aon’}), OrderedDict({‘name’: ‘i2c0’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_i2c0_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘i2c1’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_i2c1_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div4’}), OrderedDict({‘name’: ‘i2c2’, ‘gen’: True, ‘type’: ‘top’, ‘domains’: [‘0’], ‘shadowed’: False, ‘sw’: True, ‘path’: ‘rstmgr_aon_resets.rst_i2c2_n’, ‘parent’: ‘lc_src’, ‘clock’: ‘io_div4’})]
rst_nilc_io_div4
export_rstsOrderedDict()
with_alert_dumpTrue
topnameegret
uniquified_modulesOrderedDict()
with_cpu_dumpTrue
module_instance_namerstmgr