Pavona Software APIs
api.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_TOP_EGRET_DT_API_H_
8#define OPENTITAN_TOP_EGRET_DT_API_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) API for top egret
17 *
18 * This file contains the type definitions and global functions of the DT.
19 *
20 * The DT models the chip as a collection of instances. Each instance has
21 * a type (the IP block) and a number of attributes such as I/Os, IRQs
22 * and so on. The DT also provides top-specific lists of global resources
23 * such as I/O pads, clocks and interrupts.
24 */
25
26#include <stddef.h>
27#include <stdint.h>
29
30/**
31 * List of device types.
32 *
33 * Device types are guaranteed to be numbered consecutively from 0.
34 */
35typedef enum dt_device_type {
36 kDtDeviceTypeUnknown = 0, /**< Instance of unknown type */
37 kDtDeviceTypeAcc = 1, /**< instance of acc */
38 kDtDeviceTypeAdcCtrl = 2, /**< instance of adc_ctrl */
39 kDtDeviceTypeAes = 3, /**< instance of aes */
40 kDtDeviceTypeAlertHandler = 4, /**< instance of alert_handler */
41 kDtDeviceTypeAonTimer = 5, /**< instance of aon_timer */
42 kDtDeviceTypeAst = 6, /**< instance of ast */
43 kDtDeviceTypeClkmgr = 7, /**< instance of clkmgr */
44 kDtDeviceTypeCsrng = 8, /**< instance of csrng */
45 kDtDeviceTypeEdn = 9, /**< instance of edn */
46 kDtDeviceTypeEntropySrc = 10, /**< instance of entropy_src */
47 kDtDeviceTypeFlashCtrl = 11, /**< instance of flash_ctrl */
48 kDtDeviceTypeFlashMacroWrapper = 12, /**< instance of flash_macro_wrapper */
49 kDtDeviceTypeGpio = 13, /**< instance of gpio */
50 kDtDeviceTypeHmac = 14, /**< instance of hmac */
51 kDtDeviceTypeI2c = 15, /**< instance of i2c */
52 kDtDeviceTypeKeymgr = 16, /**< instance of keymgr */
53 kDtDeviceTypeKmac = 17, /**< instance of kmac */
54 kDtDeviceTypeLcCtrl = 18, /**< instance of lc_ctrl */
55 kDtDeviceTypeOtpCtrl = 19, /**< instance of otp_ctrl */
56 kDtDeviceTypeOtpMacro = 20, /**< instance of otp_macro */
57 kDtDeviceTypePattgen = 21, /**< instance of pattgen */
58 kDtDeviceTypePinmux = 22, /**< instance of pinmux */
59 kDtDeviceTypePwm = 23, /**< instance of pwm */
60 kDtDeviceTypePwrmgr = 24, /**< instance of pwrmgr */
61 kDtDeviceTypeRomCtrl = 25, /**< instance of rom_ctrl */
62 kDtDeviceTypeRstmgr = 26, /**< instance of rstmgr */
63 kDtDeviceTypeRvCoreIbex = 27, /**< instance of rv_core_ibex */
64 kDtDeviceTypeRvDm = 28, /**< instance of rv_dm */
65 kDtDeviceTypeRvPlic = 29, /**< instance of rv_plic */
66 kDtDeviceTypeRvTimer = 30, /**< instance of rv_timer */
67 kDtDeviceTypeSensorCtrl = 31, /**< instance of sensor_ctrl */
68 kDtDeviceTypeSpiDevice = 32, /**< instance of spi_device */
69 kDtDeviceTypeSpiHost = 33, /**< instance of spi_host */
70 kDtDeviceTypeSramCtrl = 34, /**< instance of sram_ctrl */
71 kDtDeviceTypeSysrstCtrl = 35, /**< instance of sysrst_ctrl */
72 kDtDeviceTypeUart = 36, /**< instance of uart */
73 kDtDeviceTypeUsbdev = 37, /**< instance of usbdev */
75
76enum {
77 kDtDeviceTypeCount = 38, /**< Number of instance types */
78};
79
80
81/**
82 * List of instance IDs.
83 *
84 * Instance IDs are guaranteed to be numbered consecutively from 0.
85 */
86typedef enum dt_instance_id {
87 kDtInstanceIdUnknown = 0, /**< Unknown instance */
88 kDtInstanceIdAcc = 1, /**< instance acc of acc */
89 kDtInstanceIdAdcCtrlAon = 2, /**< instance adc_ctrl_aon of adc_ctrl */
90 kDtInstanceIdAes = 3, /**< instance aes of aes */
91 kDtInstanceIdAlertHandler = 4, /**< instance alert_handler of alert_handler */
92 kDtInstanceIdAonTimerAon = 5, /**< instance aon_timer_aon of aon_timer */
93 kDtInstanceIdAst = 6, /**< instance ast of ast */
94 kDtInstanceIdClkmgrAon = 7, /**< instance clkmgr_aon of clkmgr */
95 kDtInstanceIdCsrng = 8, /**< instance csrng of csrng */
96 kDtInstanceIdEdn0 = 9, /**< instance edn0 of edn */
97 kDtInstanceIdEdn1 = 10, /**< instance edn1 of edn */
98 kDtInstanceIdEntropySrc = 11, /**< instance entropy_src of entropy_src */
99 kDtInstanceIdFlashCtrl = 12, /**< instance flash_ctrl of flash_ctrl */
100 kDtInstanceIdFlashMacroWrapper = 13, /**< instance flash_macro_wrapper of flash_macro_wrapper */
101 kDtInstanceIdGpio = 14, /**< instance gpio of gpio */
102 kDtInstanceIdHmac = 15, /**< instance hmac of hmac */
103 kDtInstanceIdI2c0 = 16, /**< instance i2c0 of i2c */
104 kDtInstanceIdI2c1 = 17, /**< instance i2c1 of i2c */
105 kDtInstanceIdI2c2 = 18, /**< instance i2c2 of i2c */
106 kDtInstanceIdKeymgr = 19, /**< instance keymgr of keymgr */
107 kDtInstanceIdKmac = 20, /**< instance kmac of kmac */
108 kDtInstanceIdLcCtrl = 21, /**< instance lc_ctrl of lc_ctrl */
109 kDtInstanceIdOtpCtrl = 22, /**< instance otp_ctrl of otp_ctrl */
110 kDtInstanceIdOtpMacro = 23, /**< instance otp_macro of otp_macro */
111 kDtInstanceIdPattgen = 24, /**< instance pattgen of pattgen */
112 kDtInstanceIdPinmuxAon = 25, /**< instance pinmux_aon of pinmux */
113 kDtInstanceIdPwmAon = 26, /**< instance pwm_aon of pwm */
114 kDtInstanceIdPwrmgrAon = 27, /**< instance pwrmgr_aon of pwrmgr */
115 kDtInstanceIdRomCtrl = 28, /**< instance rom_ctrl of rom_ctrl */
116 kDtInstanceIdRstmgrAon = 29, /**< instance rstmgr_aon of rstmgr */
117 kDtInstanceIdRvCoreIbex = 30, /**< instance rv_core_ibex of rv_core_ibex */
118 kDtInstanceIdRvDm = 31, /**< instance rv_dm of rv_dm */
119 kDtInstanceIdRvPlic = 32, /**< instance rv_plic of rv_plic */
120 kDtInstanceIdRvTimer = 33, /**< instance rv_timer of rv_timer */
121 kDtInstanceIdSensorCtrlAon = 34, /**< instance sensor_ctrl_aon of sensor_ctrl */
122 kDtInstanceIdSpiDevice = 35, /**< instance spi_device of spi_device */
123 kDtInstanceIdSpiHost0 = 36, /**< instance spi_host0 of spi_host */
124 kDtInstanceIdSpiHost1 = 37, /**< instance spi_host1 of spi_host */
125 kDtInstanceIdSramCtrlRetAon = 38, /**< instance sram_ctrl_ret_aon of sram_ctrl */
126 kDtInstanceIdSramCtrlMain = 39, /**< instance sram_ctrl_main of sram_ctrl */
127 kDtInstanceIdSysrstCtrlAon = 40, /**< instance sysrst_ctrl_aon of sysrst_ctrl */
128 kDtInstanceIdUart0 = 41, /**< instance uart0 of uart */
129 kDtInstanceIdUart1 = 42, /**< instance uart1 of uart */
130 kDtInstanceIdUart2 = 43, /**< instance uart2 of uart */
131 kDtInstanceIdUart3 = 44, /**< instance uart3 of uart */
132 kDtInstanceIdUsbdev = 45, /**< instance usbdev of usbdev */
134
135enum {
136 kDtInstanceIdCount = 46, /**< Number of instance IDs */
137};
138
139
140/**
141 * Get the instance type of a device instance.
142 *
143 * For example the instance type of `kDtUart0` is `kDtInstanceTypeUart`.
144 *
145 * @param id An instance ID.
146 * @return The instance type, or `kDtInstanceIdUnknown` if the ID is not valid.
147 */
149
150/** PLIC IRQ ID type.
151 *
152 * This type represents a raw IRQ ID from the PLIC.
153 *
154 * This is an alias to the top's `plic_irq_id_t` type for backward compatibility
155 * with existing code.
156 */
158
159/** PLIC IRQ ID for no interrupt. */
160static const dt_plic_irq_id_t kDtPlicIrqIdNone = kTopEgretPlicIrqIdNone;
161
162/**
163 * Get the instance ID for a given PLIC IRQ ID.
164 *
165 * For example, on egret, the instance ID of `kTopEgretPlicIrqIdUart0TxWatermark`
166 * is `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
167 * IRQ name, for example `dt_uart_irq_from_plic_id` for the UART.
168 *
169 * @param irq A PLIC ID.
170 * @return The instance ID, or `kDtInstanceIdUnknown` if the PLIC ID is not valid.
171 */
173
174/**
175 * Alert ID type.
176 *
177 * This type represents a raw alert ID from the Alert Handler.
178 *
179 * This is an alias to the top's `alert_id_t` type for backward compatibility
180 * with existing code.
181 */
183
184/** Number of alerts. */
185enum {
186 /** Total number of alert IDs. */
187 kDtAlertCount = kTopEgretAlertIdLast + 1,
188};
189
190/**
191 * Get the instance ID for a given alert ID.
192 *
193 * For example, on egret, the instance ID of `kTopEgretAlertIdUart0FatalFault` is
194 * `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
195 * alert name, for example `dt_uart_alert_from_alert_id` for the UART.
196 *
197 * @param alert An alert ID.
198 * @return The instance ID, or `kDtInstanceIdUnknown` if the alert ID is not valid.
199 */
201
202/**
203 * List of clocks.
204 *
205 * Clocks are guaranteed to be numbered consecutively from 0.
206 */
207typedef enum dt_clock {
208 kDtClockMain = 0, /**< clock main */
209 kDtClockIo = 1, /**< clock io */
210 kDtClockUsb = 2, /**< clock usb */
211 kDtClockAon = 3, /**< clock aon */
212 kDtClockIoDiv2 = 4, /**< clock io_div2 */
213 kDtClockIoDiv4 = 5, /**< clock io_div4 */
215
216enum {
217 kDtClockCount = 6, /**< Number of clocks */
218};
219
220
221/**
222 * Get the frequency of a clock.
223 *
224 * @param clk A clock ID.
225 * @return Clock frequency in Hz.
226 */
228
229/**
230 * List of resets.
231 *
232 * Resets are guaranteed to be numbered consecutively from 0.
233 */
234typedef enum dt_reset {
235 kDtResetUnknown = 0, /**< Unknown reset */
236 kDtResetPorAon = 1, /**< Reset node por_aon */
237 kDtResetLcSrc = 2, /**< Reset node lc_src */
238 kDtResetSysSrc = 3, /**< Reset node sys_src */
239 kDtResetPor = 4, /**< Reset node por */
240 kDtResetPorIo = 5, /**< Reset node por_io */
241 kDtResetPorIoDiv2 = 6, /**< Reset node por_io_div2 */
242 kDtResetPorIoDiv4 = 7, /**< Reset node por_io_div4 */
243 kDtResetPorUsb = 8, /**< Reset node por_usb */
244 kDtResetLc = 9, /**< Reset node lc */
245 kDtResetLcAon = 10, /**< Reset node lc_aon */
246 kDtResetLcIo = 11, /**< Reset node lc_io */
247 kDtResetLcIoDiv2 = 12, /**< Reset node lc_io_div2 */
248 kDtResetLcIoDiv4 = 13, /**< Reset node lc_io_div4 */
249 kDtResetLcUsb = 14, /**< Reset node lc_usb */
250 kDtResetSys = 15, /**< Reset node sys */
251 kDtResetSysIoDiv4 = 16, /**< Reset node sys_io_div4 */
252 kDtResetSpiDevice = 17, /**< Reset node spi_device */
253 kDtResetSpiHost0 = 18, /**< Reset node spi_host0 */
254 kDtResetSpiHost1 = 19, /**< Reset node spi_host1 */
255 kDtResetUsb = 20, /**< Reset node usb */
256 kDtResetUsbAon = 21, /**< Reset node usb_aon */
257 kDtResetI2c0 = 22, /**< Reset node i2c0 */
258 kDtResetI2c1 = 23, /**< Reset node i2c1 */
259 kDtResetI2c2 = 24, /**< Reset node i2c2 */
261
262enum {
263 kDtResetCount = 25, /**< Number of resets */
264};
265
266
267/**
268 * List of pads names.
269 */
270typedef enum dt_pad {
271 kDtPadConstantZero = 0, /**< Pad that is constantly tied to zero (input) */
272 kDtPadConstantOne = 1, /**< Pad that is constantly tied to one (input) */
273 kDtPadIoa0 = 2, /**< Muxed IO pad */
274 kDtPadIoa1 = 3, /**< Muxed IO pad */
275 kDtPadIoa2 = 4, /**< Muxed IO pad */
276 kDtPadIoa3 = 5, /**< Muxed IO pad */
277 kDtPadIoa4 = 6, /**< Muxed IO pad */
278 kDtPadIoa5 = 7, /**< Muxed IO pad */
279 kDtPadIoa6 = 8, /**< Muxed IO pad */
280 kDtPadIoa7 = 9, /**< Muxed IO pad */
281 kDtPadIoa8 = 10, /**< Muxed IO pad */
282 kDtPadIob0 = 11, /**< Muxed IO pad */
283 kDtPadIob1 = 12, /**< Muxed IO pad */
284 kDtPadIob2 = 13, /**< Muxed IO pad */
285 kDtPadIob3 = 14, /**< Muxed IO pad */
286 kDtPadIob4 = 15, /**< Muxed IO pad */
287 kDtPadIob5 = 16, /**< Muxed IO pad */
288 kDtPadIob6 = 17, /**< Muxed IO pad */
289 kDtPadIob7 = 18, /**< Muxed IO pad */
290 kDtPadIob8 = 19, /**< Muxed IO pad */
291 kDtPadIob9 = 20, /**< Muxed IO pad */
292 kDtPadIob10 = 21, /**< Muxed IO pad */
293 kDtPadIob11 = 22, /**< Muxed IO pad */
294 kDtPadIob12 = 23, /**< Muxed IO pad */
295 kDtPadIoc0 = 24, /**< Muxed IO pad */
296 kDtPadIoc1 = 25, /**< Muxed IO pad */
297 kDtPadIoc2 = 26, /**< Muxed IO pad */
298 kDtPadIoc3 = 27, /**< Muxed IO pad */
299 kDtPadIoc4 = 28, /**< Muxed IO pad */
300 kDtPadIoc5 = 29, /**< Muxed IO pad */
301 kDtPadIoc6 = 30, /**< Muxed IO pad */
302 kDtPadIoc7 = 31, /**< Muxed IO pad */
303 kDtPadIoc8 = 32, /**< Muxed IO pad */
304 kDtPadIoc9 = 33, /**< Muxed IO pad */
305 kDtPadIoc10 = 34, /**< Muxed IO pad */
306 kDtPadIoc11 = 35, /**< Muxed IO pad */
307 kDtPadIoc12 = 36, /**< Muxed IO pad */
308 kDtPadIor0 = 37, /**< Muxed IO pad */
309 kDtPadIor1 = 38, /**< Muxed IO pad */
310 kDtPadIor2 = 39, /**< Muxed IO pad */
311 kDtPadIor3 = 40, /**< Muxed IO pad */
312 kDtPadIor4 = 41, /**< Muxed IO pad */
313 kDtPadIor5 = 42, /**< Muxed IO pad */
314 kDtPadIor6 = 43, /**< Muxed IO pad */
315 kDtPadIor7 = 44, /**< Muxed IO pad */
316 kDtPadIor10 = 45, /**< Muxed IO pad */
317 kDtPadIor11 = 46, /**< Muxed IO pad */
318 kDtPadIor12 = 47, /**< Muxed IO pad */
319 kDtPadIor13 = 48, /**< Muxed IO pad */
320 kDtPadUsbdevUsbDp = 49, /**< */
321 kDtPadUsbdevUsbDn = 50, /**< */
322 kDtPadSpiHost0Sd0 = 51, /**< SPI host data */
323 kDtPadSpiHost0Sd1 = 52, /**< SPI host data */
324 kDtPadSpiHost0Sd2 = 53, /**< SPI host data */
325 kDtPadSpiHost0Sd3 = 54, /**< SPI host data */
326 kDtPadSpiDeviceSd0 = 55, /**< SPI device data */
327 kDtPadSpiDeviceSd1 = 56, /**< SPI device data */
328 kDtPadSpiDeviceSd2 = 57, /**< SPI device data */
329 kDtPadSpiDeviceSd3 = 58, /**< SPI device data */
330 kDtPadSysrstCtrlAonEcRstL = 59, /**< Dedicated sysrst_ctrl output (ec_rst_l) */
331 kDtPadSysrstCtrlAonFlashWpL = 60, /**< Dedicated sysrst_ctrl output (flash_wp_l)) */
332 kDtPadSpiDeviceSck = 61, /**< SPI device clock */
333 kDtPadSpiDeviceCsb = 62, /**< SPI device chip select */
334 kDtPadSpiHost0Sck = 63, /**< SPI host clock */
335 kDtPadSpiHost0Csb = 64, /**< SPI host chip select */
337
338enum {
339 kDtPadCount = 65, /**< Number of pads */
340};
341
342
343/** Type of peripheral I/O. */
344typedef enum dt_periph_io_type {
345 /** This peripheral I/O is connected to a muxed IO (MIO). */
347 /** This peripheral I/O is connected to a direct IO (DIO). */
349 /** This peripheral I/O is not connected to either a MIO or a DIO. */
352
353
354/** Direction of a peripheral I/O. */
355typedef enum dt_periph_io_dir {
356 /** This peripheral I/O is an input. */
358 /** This peripheral I/O is an output */
360 /** This peripheral I/O is an input-output */
363
364/** Peripheral I/O description.
365 *
366 * A `dt_periph_io_t` represents a HW IP block peripheral I/O, which can be an input, output or both.
367 * Importantly, this only represents how the block peripheral I/O is wired, i.e.
368 * whether it is connected a MIO or a direct IO on the pinmux, and the relevant information necessary to
369 * configure it.
370 *
371 * **Note:** The fields of this structure are internal, use the dt_periph_io_* functions to access them.
372 */
373typedef struct dt_periph_io {
374 struct {
375 dt_periph_io_type_t type; /**< Peripheral I/O type */
376 dt_periph_io_dir_t dir; /**< Peripheral I/O direction */
377 /**
378 * For `kDtPeriphIoTypeMio`: peripheral input number. This is the index of the MIO_PERIPH_INSEL register
379 * that controls this peripheral I/O.
380 *
381 * For `kDtPeriphIoTypeDio`: DIO pad number. This is the index of the various DIO_PAD_* registers
382 * that control this peripheral I/O.
383 */
384 uint16_t periph_input_or_direct_pad;
385 /**
386 * For `kDtPeriphIoTypeMio`: peripheral output number. This is the value to put in the MIO_OUTSEL registers
387 * to connect an output to this peripheral I/O. For `kDtPeriphIoTypeDio`: the pad index (`dt_pad_t`) to which this I/O is connected.
388 */
389 uint16_t outsel_or_dt_pad;
390 } __internal; /**< Private fields */
392
393
394/* Peripheral I/O that is constantly tied to high-Z (output only) */
395extern const dt_periph_io_t kDtPeriphIoConstantHighZ;
396
397/* Peripheral I/O that is constantly tied to one (output only) */
398extern const dt_periph_io_t kDtPeriphIoConstantZero;
399
400/* Peripheral I/O that is constantly tied to zero (output only) */
401extern const dt_periph_io_t kDtPeriphIoConstantOne;
402
403/**
404 * Return the type of a `dt_periph_io_t`.
405 *
406 * @param periph_io A peripheral I/O description.
407 * @return The peripheral I/O type (MIO, DIO, etc).
408 */
410 return periph_io.__internal.type;
411}
412
413/**
414 * Return the direction of a `dt_periph_io_t`.
415 *
416 * @param periph_io A peripheral I/O description.
417 * @return The peripheral I/O direction.
418 */
419static inline dt_periph_io_dir_t dt_periph_io_dir(dt_periph_io_t periph_io) {
420 return periph_io.__internal.dir;
421}
422
423/**
424 * Pinmux types.
425 *
426 * These types are aliases to top-level types for backward compatibility
427 * with existing code.
428 */
430typedef top_egret_pinmux_insel_t dt_pinmux_insel_t;
431typedef top_egret_pinmux_outsel_t dt_pinmux_outsel_t;
432typedef top_egret_pinmux_mio_out_t dt_pinmux_mio_out_t;
433typedef top_egret_direct_pads_t dt_pinmux_direct_pad_t;
434typedef top_egret_muxed_pads_t dt_pinmux_muxed_pad_t;
435
436/** Tie constantly to zero. */
437static const dt_pinmux_outsel_t kDtPinmuxOutselConstantZero = kTopEgretPinmuxOutselConstantZero;
438
439/** Tie constantly to one. */
440static const dt_pinmux_outsel_t kDtPinmuxOutselConstantOne = kTopEgretPinmuxOutselConstantOne;
441
442/** Tie constantly to high-Z. */
443static const dt_pinmux_outsel_t kDtPinmuxOutselConstantHighZ = kTopEgretPinmuxOutselConstantHighZ;
444
445/**
446 * Return the peripheral input for an MIO peripheral I/O.
447 *
448 * This is the index of the `MIO_PERIPH_INSEL` pinmux register that controls this peripheral I/O.
449 *
450 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
451 * @return The peripheral input number of the MIO that this peripheral I/O is connected to.
452 *
453 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
454 * inputs (`kDtPeriphIoDirIn`). For any other peripheral I/O, the return value is unspecified.
455 */
456static inline dt_pinmux_peripheral_in_t dt_periph_io_mio_periph_input(dt_periph_io_t periph_io) {
457 return (dt_pinmux_peripheral_in_t)periph_io.__internal.periph_input_or_direct_pad;
458}
459
460/**
461 * Return the outsel for an MIO peripheral I/O.
462 *
463 * This is the value to put in the `MIO_OUTSEL` pinmux registers to connect a pad to this peripheral I/O.
464 *
465 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
466 * @return The outsel of the MIO that this peripheral I/O is connected to.
467 *
468 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
469 * outputs (`kDtPeriphIoDirOut`). For any other peripheral I/O, the return value is unspecified.
470 */
471static inline dt_pinmux_outsel_t dt_periph_io_mio_outsel(dt_periph_io_t periph_io) {
472 return (dt_pinmux_outsel_t)periph_io.__internal.outsel_or_dt_pad;
473}
474
475/**
476 * Return the direct pad number of a DIO peripheral I/O.
477 *
478 * This is the index of the various `DIO_PAD_*` pinmux registers that control this peripheral I/O.
479 *
480 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
481 * @return The direct pad number of the DIO that this peripheral I/O is connected to.
482 *
483 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
484 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
485 */
486static inline dt_pinmux_direct_pad_t dt_periph_io_dio_pad_index(dt_periph_io_t periph_io) {
487 return (dt_pinmux_direct_pad_t)periph_io.__internal.periph_input_or_direct_pad;
488}
489
490/**
491 * Return the pad of a DIO peripheral I/O.
492 *
493 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
494 * @return The pad to which this peripheral I/O is connected to.
495 *
496 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
497 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
498 */
499static inline dt_pad_t dt_periph_io_dio_pad(dt_periph_io_t periph_io) {
500 return (dt_pad_t)periph_io.__internal.outsel_or_dt_pad;
501}
502
503/** Type of a pad. */
504typedef enum dt_pad_type {
505 /** This pad is a muxed IO (MIO). */
507 /** This pad is a direct IO (DIO). */
509 /** This pad is not an MIO or a DIO. */
512
513/**
514 * Return the type of a `dt_pad_t`.
515 *
516 * @param pad A pad description.
517 * @return The pad type (MIO, DIO, etc).
518 */
520
521/**
522 * Return the pad out number for an MIO pad.
523 *
524 * This is the index of the `MIO_OUT` registers that control this pad
525 * (or the output part of this pad).
526 *
527 * @param pad A pad of type `kDtPadTypeMio`.
528 * @return The pad out number of the MIO.
529 *
530 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio` which are
531 * either inputs or inouts. For any other pad, the return value is unspecified.
532 */
533dt_pinmux_mio_out_t dt_pad_mio_out(dt_pad_t pad);
534
535/**
536 * Return the pad out number for an MIO pad.
537 *
538 * This is the index of the `MIO_PAD` registers that control this pad
539 * (or the output part of this pad).
540 *
541 * @param pad A pad of type `kDtPadTypeMio`.
542 * @return The pad out number of the MIO.
543 *
544 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
545 * For any other pad, the return value is unspecified.
546 */
547dt_pinmux_muxed_pad_t dt_pad_mio_pad_index(dt_pad_t pad);
548
549/**
550 * Return the insel for an MIO pad.
551 *
552 * This is the value to put in the `MIO_PERIPH_INSEL` registers to connect a peripheral I/O to this pad.
553 *
554 * @param pad A pad of type `kDtPadTypeMio`.
555 * @return The insel of the MIO that this pad is connected to.
556 *
557 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
558 * For any other pad, the return value is unspecified.
559 */
560dt_pinmux_insel_t dt_pad_mio_insel(dt_pad_t pad);
561
562/**
563 * Return the direct pad number of a DIO pad.
564 *
565 * This is the index of the various `DIO_PAD_*` registers that control this pad.
566 *
567 * @param pad A pad of type `kDtPadTypeDio`.
568 * @return The direct pad number of the DID that this pad is connected to.
569 *
570 * **Note:** This function only makes sense for pads of type `kDtPeriphIoTypeDio` which are
571 * either outputs or inouts. For any other pad type, the return value is unspecified.
572 */
573dt_pinmux_direct_pad_t dt_pad_dio_pad_index(dt_pad_t pad);
574
575#ifdef __cplusplus
576} // extern "C"
577#endif // __cplusplus
578
579#endif // OPENTITAN_TOP_EGRET_DT_API_H_