top_scafi_deprecated.h File Reference

Top-specific Definitions. More...

Go to the source code of this file.

Macros
#define	TOP_SCAFI_DEPRECATED_UART0_BASE_ADDR   0x40000000u
	Peripheral base address for uart0 in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_UART0_SIZE_BYTES   0x40u
	Peripheral size for uart0 in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_UART1_BASE_ADDR   0x40010000u
	Peripheral base address for uart1 in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_UART1_SIZE_BYTES   0x40u
	Peripheral size for uart1 in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_GPIO_BASE_ADDR   0x40040000u
	Peripheral base address for gpio in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_GPIO_SIZE_BYTES   0x80u
	Peripheral size for gpio in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_SPI_DEVICE_BASE_ADDR   0x40050000u
	Peripheral base address for spi_device in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_SPI_DEVICE_SIZE_BYTES   0x2000u
	Peripheral size for spi_device in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_SPI_HOST0_BASE_ADDR   0x40060000u
	Peripheral base address for spi_host0 in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_SPI_HOST0_SIZE_BYTES   0x40u
	Peripheral size for spi_host0 in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_RV_TIMER_BASE_ADDR   0x40100000u
	Peripheral base address for rv_timer in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_RV_TIMER_SIZE_BYTES   0x200u
	Peripheral size for rv_timer in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_USBDEV_BASE_ADDR   0x40320000u
	Peripheral base address for usbdev in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_USBDEV_SIZE_BYTES   0x1000u
	Peripheral size for usbdev in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_PWRMGR_AON_BASE_ADDR   0x40400000u
	Peripheral base address for pwrmgr_aon in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_PWRMGR_AON_SIZE_BYTES   0x80u
	Peripheral size for pwrmgr_aon in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_RSTMGR_AON_BASE_ADDR   0x40410000u
	Peripheral base address for rstmgr_aon in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_RSTMGR_AON_SIZE_BYTES   0x80u
	Peripheral size for rstmgr_aon in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_CLKMGR_AON_BASE_ADDR   0x40420000u
	Peripheral base address for clkmgr_aon in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_CLKMGR_AON_SIZE_BYTES   0x80u
	Peripheral size for clkmgr_aon in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_PINMUX_AON_BASE_ADDR   0x40460000u
	Peripheral base address for pinmux_aon in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_PINMUX_AON_SIZE_BYTES   0x1000u
	Peripheral size for pinmux_aon in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_AON_TIMER_AON_BASE_ADDR   0x40470000u
	Peripheral base address for aon_timer_aon in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_AON_TIMER_AON_SIZE_BYTES   0x40u
	Peripheral size for aon_timer_aon in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_AST_BASE_ADDR   0x40480000u
	Peripheral base address for ast in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_AST_SIZE_BYTES   0x400u
	Peripheral size for ast in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_FLASH_CTRL_CORE_BASE_ADDR   0x41000000u
	Peripheral base address for core device on flash_ctrl in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_FLASH_CTRL_CORE_SIZE_BYTES   0x200u
	Peripheral size for core device on flash_ctrl in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_FLASH_MACRO_WRAPPER_BASE_ADDR   0x41008000u
	Peripheral base address for flash_macro_wrapper in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_FLASH_MACRO_WRAPPER_SIZE_BYTES   0x80u
	Peripheral size for flash_macro_wrapper in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_RV_PLIC_BASE_ADDR   0x48000000u
	Peripheral base address for rv_plic in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_RV_PLIC_SIZE_BYTES   0x8000000u
	Peripheral size for rv_plic in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_AES_BASE_ADDR   0x41100000u
	Peripheral base address for aes in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_AES_SIZE_BYTES   0x100u
	Peripheral size for aes in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_REGS_BASE_ADDR   0x411C0000u
	Peripheral base address for regs device on sram_ctrl_main in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_REGS_SIZE_BYTES   0x40u
	Peripheral size for regs device on sram_ctrl_main in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_ROM_CTRL_REGS_BASE_ADDR   0x411E0000u
	Peripheral base address for regs device on rom_ctrl in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_ROM_CTRL_REGS_SIZE_BYTES   0x80u
	Peripheral size for regs device on rom_ctrl in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_RV_CORE_IBEX_CFG_BASE_ADDR   0x411F0000u
	Peripheral base address for cfg device on rv_core_ibex in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_RV_CORE_IBEX_CFG_SIZE_BYTES   0x100u
	Peripheral size for cfg device on rv_core_ibex in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_FLASH_CTRL_MEM_BASE_ADDR   0x20000000u
	Memory base address for mem memory on flash_ctrl in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_FLASH_CTRL_MEM_SIZE_BYTES   0x10000u
	Memory size for mem memory on flash_ctrl in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_RAM_BASE_ADDR   0x10000000u
	Memory base address for ram memory on sram_ctrl_main in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_RAM_SIZE_BYTES   0x20000u
	Memory size for ram memory on sram_ctrl_main in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_ROM_CTRL_ROM_BASE_ADDR   0x8000u
	Memory base address for rom memory on rom_ctrl in top scafi_deprecated.
#define	TOP_SCAFI_DEPRECATED_ROM_CTRL_ROM_SIZE_BYTES   0x8000u
	Memory size for rom memory on rom_ctrl in top scafi_deprecated.
#define	PINMUX_MIO_PERIPH_INSEL_IDX_OFFSET   2
#define	NUM_MIO_PADS   47
#define	NUM_DIO_PADS   14
#define	PINMUX_PERIPH_OUTSEL_IDX_OFFSET   3
#define	TOP_SCAFI_DEPRECATED_MMIO_BASE_ADDR   0x40000000u
	MMIO Region.
#define	TOP_SCAFI_DEPRECATED_MMIO_SIZE_BYTES   0x10000000u

Typedefs
typedef enum top_scafi_deprecated_plic_peripheral	top_scafi_deprecated_plic_peripheral_t
	PLIC Interrupt Source Peripheral.
typedef enum top_scafi_deprecated_plic_irq_id	top_scafi_deprecated_plic_irq_id_t
	PLIC Interrupt Source.
typedef enum top_scafi_deprecated_plic_target	top_scafi_deprecated_plic_target_t
	PLIC Interrupt Target.
typedef enum top_scafi_deprecated_pinmux_peripheral_in	top_scafi_deprecated_pinmux_peripheral_in_t
	Pinmux Peripheral Input.
typedef enum top_scafi_deprecated_pinmux_insel	top_scafi_deprecated_pinmux_insel_t
	Pinmux MIO Input Selector.
typedef enum top_scafi_deprecated_pinmux_mio_out	top_scafi_deprecated_pinmux_mio_out_t
	Pinmux MIO Output.
typedef enum top_scafi_deprecated_pinmux_outsel	top_scafi_deprecated_pinmux_outsel_t
	Pinmux Peripheral Output Selector.
typedef enum top_scafi_deprecated_direct_pads	top_scafi_deprecated_direct_pads_t
	Dedicated Pad Selects.
typedef enum top_scafi_deprecated_muxed_pads	top_scafi_deprecated_muxed_pads_t
	Muxed Pad Selects.
typedef enum top_scafi_deprecated_power_manager_wake_ups	top_scafi_deprecated_power_manager_wake_ups_t
	Power Manager Wakeup Signals.
typedef enum top_scafi_deprecated_reset_manager_sw_resets	top_scafi_deprecated_reset_manager_sw_resets_t
	Reset Manager Software Controlled Resets.
typedef enum top_scafi_deprecated_power_manager_reset_requests	top_scafi_deprecated_power_manager_reset_requests_t
	Power Manager Reset Request Signals.
typedef enum top_scafi_deprecated_gateable_clocks	top_scafi_deprecated_gateable_clocks_t
	Clock Manager Software-Controlled ("Gated") Clocks.
typedef enum top_scafi_deprecated_hintable_clocks	top_scafi_deprecated_hintable_clocks_t
	Clock Manager Software-Hinted Clocks.

Enumerations
enum	top_scafi_deprecated_plic_peripheral {   kTopScafiDeprecatedPlicPeripheralUnknown = 0 ,   kTopScafiDeprecatedPlicPeripheralUart0 = 1 ,   kTopScafiDeprecatedPlicPeripheralUart1 = 2 ,   kTopScafiDeprecatedPlicPeripheralGpio = 3 ,   kTopScafiDeprecatedPlicPeripheralSpiDevice = 4 ,   kTopScafiDeprecatedPlicPeripheralSpiHost0 = 5 ,   kTopScafiDeprecatedPlicPeripheralUsbdev = 6 ,   kTopScafiDeprecatedPlicPeripheralPwrmgrAon = 7 ,   kTopScafiDeprecatedPlicPeripheralAonTimerAon = 8 ,   kTopScafiDeprecatedPlicPeripheralFlashCtrl = 9 ,   kTopScafiDeprecatedPlicPeripheralLast = 9 }
	PLIC Interrupt Source Peripheral. More...
enum	top_scafi_deprecated_plic_irq_id {   kTopScafiDeprecatedPlicIrqIdNone = 0 ,   kTopScafiDeprecatedPlicIrqIdUart0TxWatermark = 1 ,   kTopScafiDeprecatedPlicIrqIdUart0RxWatermark = 2 ,   kTopScafiDeprecatedPlicIrqIdUart0TxDone = 3 ,   kTopScafiDeprecatedPlicIrqIdUart0RxOverflow = 4 ,   kTopScafiDeprecatedPlicIrqIdUart0RxFrameErr = 5 ,   kTopScafiDeprecatedPlicIrqIdUart0RxBreakErr = 6 ,   kTopScafiDeprecatedPlicIrqIdUart0RxTimeout = 7 ,   kTopScafiDeprecatedPlicIrqIdUart0RxParityErr = 8 ,   kTopScafiDeprecatedPlicIrqIdUart0TxEmpty = 9 ,   kTopScafiDeprecatedPlicIrqIdUart1TxWatermark = 10 ,   kTopScafiDeprecatedPlicIrqIdUart1RxWatermark = 11 ,   kTopScafiDeprecatedPlicIrqIdUart1TxDone = 12 ,   kTopScafiDeprecatedPlicIrqIdUart1RxOverflow = 13 ,   kTopScafiDeprecatedPlicIrqIdUart1RxFrameErr = 14 ,   kTopScafiDeprecatedPlicIrqIdUart1RxBreakErr = 15 ,   kTopScafiDeprecatedPlicIrqIdUart1RxTimeout = 16 ,   kTopScafiDeprecatedPlicIrqIdUart1RxParityErr = 17 ,   kTopScafiDeprecatedPlicIrqIdUart1TxEmpty = 18 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio0 = 19 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio1 = 20 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio2 = 21 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio3 = 22 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio4 = 23 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio5 = 24 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio6 = 25 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio7 = 26 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio8 = 27 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio9 = 28 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio10 = 29 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio11 = 30 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio12 = 31 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio13 = 32 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio14 = 33 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio15 = 34 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio16 = 35 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio17 = 36 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio18 = 37 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio19 = 38 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio20 = 39 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio21 = 40 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio22 = 41 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio23 = 42 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio24 = 43 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio25 = 44 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio26 = 45 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio27 = 46 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio28 = 47 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio29 = 48 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio30 = 49 ,   kTopScafiDeprecatedPlicIrqIdGpioGpio31 = 50 ,   kTopScafiDeprecatedPlicIrqIdSpiDeviceUploadCmdfifoNotEmpty = 51 ,   kTopScafiDeprecatedPlicIrqIdSpiDeviceUploadPayloadNotEmpty = 52 ,   kTopScafiDeprecatedPlicIrqIdSpiDeviceUploadPayloadOverflow = 53 ,   kTopScafiDeprecatedPlicIrqIdSpiDeviceReadbufWatermark = 54 ,   kTopScafiDeprecatedPlicIrqIdSpiDeviceReadbufFlip = 55 ,   kTopScafiDeprecatedPlicIrqIdSpiDeviceTpmHeaderNotEmpty = 56 ,   kTopScafiDeprecatedPlicIrqIdSpiDeviceTpmRdfifoCmdEnd = 57 ,   kTopScafiDeprecatedPlicIrqIdSpiDeviceTpmRdfifoDrop = 58 ,   kTopScafiDeprecatedPlicIrqIdSpiHost0Error = 59 ,   kTopScafiDeprecatedPlicIrqIdSpiHost0SpiEvent = 60 ,   kTopScafiDeprecatedPlicIrqIdUsbdevPktReceived = 61 ,   kTopScafiDeprecatedPlicIrqIdUsbdevPktSent = 62 ,   kTopScafiDeprecatedPlicIrqIdUsbdevDisconnected = 63 ,   kTopScafiDeprecatedPlicIrqIdUsbdevHostLost = 64 ,   kTopScafiDeprecatedPlicIrqIdUsbdevLinkReset = 65 ,   kTopScafiDeprecatedPlicIrqIdUsbdevLinkSuspend = 66 ,   kTopScafiDeprecatedPlicIrqIdUsbdevLinkResume = 67 ,   kTopScafiDeprecatedPlicIrqIdUsbdevAvOutEmpty = 68 ,   kTopScafiDeprecatedPlicIrqIdUsbdevRxFull = 69 ,   kTopScafiDeprecatedPlicIrqIdUsbdevAvOverflow = 70 ,   kTopScafiDeprecatedPlicIrqIdUsbdevLinkInErr = 71 ,   kTopScafiDeprecatedPlicIrqIdUsbdevRxCrcErr = 72 ,   kTopScafiDeprecatedPlicIrqIdUsbdevRxPidErr = 73 ,   kTopScafiDeprecatedPlicIrqIdUsbdevRxBitstuffErr = 74 ,   kTopScafiDeprecatedPlicIrqIdUsbdevFrame = 75 ,   kTopScafiDeprecatedPlicIrqIdUsbdevPowered = 76 ,   kTopScafiDeprecatedPlicIrqIdUsbdevLinkOutErr = 77 ,   kTopScafiDeprecatedPlicIrqIdUsbdevAvSetupEmpty = 78 ,   kTopScafiDeprecatedPlicIrqIdPwrmgrAonWakeup = 79 ,   kTopScafiDeprecatedPlicIrqIdAonTimerAonWkupTimerExpired = 80 ,   kTopScafiDeprecatedPlicIrqIdAonTimerAonWdogTimerBark = 81 ,   kTopScafiDeprecatedPlicIrqIdFlashCtrlProgEmpty = 82 ,   kTopScafiDeprecatedPlicIrqIdFlashCtrlProgLvl = 83 ,   kTopScafiDeprecatedPlicIrqIdFlashCtrlRdFull = 84 ,   kTopScafiDeprecatedPlicIrqIdFlashCtrlRdLvl = 85 ,   kTopScafiDeprecatedPlicIrqIdFlashCtrlOpDone = 86 ,   kTopScafiDeprecatedPlicIrqIdFlashCtrlCorrErr = 87 ,   kTopScafiDeprecatedPlicIrqIdLast = 87 }
	PLIC Interrupt Source. More...
enum	top_scafi_deprecated_plic_target {   kTopScafiDeprecatedPlicTargetIbex0 = 0 ,   kTopScafiDeprecatedPlicTargetLast = 0 }
	PLIC Interrupt Target. More...
enum	top_scafi_deprecated_pinmux_peripheral_in {   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio0 = 0 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio1 = 1 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio2 = 2 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio3 = 3 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio4 = 4 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio5 = 5 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio6 = 6 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio7 = 7 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio8 = 8 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio9 = 9 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio10 = 10 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio11 = 11 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio12 = 12 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio13 = 13 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio14 = 14 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio15 = 15 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio16 = 16 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio17 = 17 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio18 = 18 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio19 = 19 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio20 = 20 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio21 = 21 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio22 = 22 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio23 = 23 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio24 = 24 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio25 = 25 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio26 = 26 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio27 = 27 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio28 = 28 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio29 = 29 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio30 = 30 ,   kTopScafiDeprecatedPinmuxPeripheralInGpioGpio31 = 31 ,   kTopScafiDeprecatedPinmuxPeripheralInUart0Rx = 32 ,   kTopScafiDeprecatedPinmuxPeripheralInUart1Rx = 33 ,   kTopScafiDeprecatedPinmuxPeripheralInUsbdevSense = 34 ,   kTopScafiDeprecatedPinmuxPeripheralInLast = 34 }
	Pinmux Peripheral Input. More...
enum	top_scafi_deprecated_pinmux_insel {   kTopScafiDeprecatedPinmuxInselConstantZero = 0 ,   kTopScafiDeprecatedPinmuxInselConstantOne = 1 ,   kTopScafiDeprecatedPinmuxInselIoa0 = 2 ,   kTopScafiDeprecatedPinmuxInselIoa1 = 3 ,   kTopScafiDeprecatedPinmuxInselIoa2 = 4 ,   kTopScafiDeprecatedPinmuxInselIoa3 = 5 ,   kTopScafiDeprecatedPinmuxInselIoa4 = 6 ,   kTopScafiDeprecatedPinmuxInselIoa5 = 7 ,   kTopScafiDeprecatedPinmuxInselIoa6 = 8 ,   kTopScafiDeprecatedPinmuxInselIoa7 = 9 ,   kTopScafiDeprecatedPinmuxInselIoa8 = 10 ,   kTopScafiDeprecatedPinmuxInselIob0 = 11 ,   kTopScafiDeprecatedPinmuxInselIob1 = 12 ,   kTopScafiDeprecatedPinmuxInselIob2 = 13 ,   kTopScafiDeprecatedPinmuxInselIob3 = 14 ,   kTopScafiDeprecatedPinmuxInselIob4 = 15 ,   kTopScafiDeprecatedPinmuxInselIob5 = 16 ,   kTopScafiDeprecatedPinmuxInselIob6 = 17 ,   kTopScafiDeprecatedPinmuxInselIob7 = 18 ,   kTopScafiDeprecatedPinmuxInselIob8 = 19 ,   kTopScafiDeprecatedPinmuxInselIob9 = 20 ,   kTopScafiDeprecatedPinmuxInselIob10 = 21 ,   kTopScafiDeprecatedPinmuxInselIob11 = 22 ,   kTopScafiDeprecatedPinmuxInselIob12 = 23 ,   kTopScafiDeprecatedPinmuxInselIoc0 = 24 ,   kTopScafiDeprecatedPinmuxInselIoc1 = 25 ,   kTopScafiDeprecatedPinmuxInselIoc2 = 26 ,   kTopScafiDeprecatedPinmuxInselIoc3 = 27 ,   kTopScafiDeprecatedPinmuxInselIoc4 = 28 ,   kTopScafiDeprecatedPinmuxInselIoc5 = 29 ,   kTopScafiDeprecatedPinmuxInselIoc6 = 30 ,   kTopScafiDeprecatedPinmuxInselIoc7 = 31 ,   kTopScafiDeprecatedPinmuxInselIoc8 = 32 ,   kTopScafiDeprecatedPinmuxInselIoc9 = 33 ,   kTopScafiDeprecatedPinmuxInselIoc10 = 34 ,   kTopScafiDeprecatedPinmuxInselIoc11 = 35 ,   kTopScafiDeprecatedPinmuxInselIoc12 = 36 ,   kTopScafiDeprecatedPinmuxInselIor0 = 37 ,   kTopScafiDeprecatedPinmuxInselIor1 = 38 ,   kTopScafiDeprecatedPinmuxInselIor2 = 39 ,   kTopScafiDeprecatedPinmuxInselIor3 = 40 ,   kTopScafiDeprecatedPinmuxInselIor4 = 41 ,   kTopScafiDeprecatedPinmuxInselIor5 = 42 ,   kTopScafiDeprecatedPinmuxInselIor6 = 43 ,   kTopScafiDeprecatedPinmuxInselIor7 = 44 ,   kTopScafiDeprecatedPinmuxInselIor10 = 45 ,   kTopScafiDeprecatedPinmuxInselIor11 = 46 ,   kTopScafiDeprecatedPinmuxInselIor12 = 47 ,   kTopScafiDeprecatedPinmuxInselIor13 = 48 ,   kTopScafiDeprecatedPinmuxInselLast = 48 }
	Pinmux MIO Input Selector. More...
enum	top_scafi_deprecated_pinmux_mio_out {   kTopScafiDeprecatedPinmuxMioOutIoa0 = 0 ,   kTopScafiDeprecatedPinmuxMioOutIoa1 = 1 ,   kTopScafiDeprecatedPinmuxMioOutIoa2 = 2 ,   kTopScafiDeprecatedPinmuxMioOutIoa3 = 3 ,   kTopScafiDeprecatedPinmuxMioOutIoa4 = 4 ,   kTopScafiDeprecatedPinmuxMioOutIoa5 = 5 ,   kTopScafiDeprecatedPinmuxMioOutIoa6 = 6 ,   kTopScafiDeprecatedPinmuxMioOutIoa7 = 7 ,   kTopScafiDeprecatedPinmuxMioOutIoa8 = 8 ,   kTopScafiDeprecatedPinmuxMioOutIob0 = 9 ,   kTopScafiDeprecatedPinmuxMioOutIob1 = 10 ,   kTopScafiDeprecatedPinmuxMioOutIob2 = 11 ,   kTopScafiDeprecatedPinmuxMioOutIob3 = 12 ,   kTopScafiDeprecatedPinmuxMioOutIob4 = 13 ,   kTopScafiDeprecatedPinmuxMioOutIob5 = 14 ,   kTopScafiDeprecatedPinmuxMioOutIob6 = 15 ,   kTopScafiDeprecatedPinmuxMioOutIob7 = 16 ,   kTopScafiDeprecatedPinmuxMioOutIob8 = 17 ,   kTopScafiDeprecatedPinmuxMioOutIob9 = 18 ,   kTopScafiDeprecatedPinmuxMioOutIob10 = 19 ,   kTopScafiDeprecatedPinmuxMioOutIob11 = 20 ,   kTopScafiDeprecatedPinmuxMioOutIob12 = 21 ,   kTopScafiDeprecatedPinmuxMioOutIoc0 = 22 ,   kTopScafiDeprecatedPinmuxMioOutIoc1 = 23 ,   kTopScafiDeprecatedPinmuxMioOutIoc2 = 24 ,   kTopScafiDeprecatedPinmuxMioOutIoc3 = 25 ,   kTopScafiDeprecatedPinmuxMioOutIoc4 = 26 ,   kTopScafiDeprecatedPinmuxMioOutIoc5 = 27 ,   kTopScafiDeprecatedPinmuxMioOutIoc6 = 28 ,   kTopScafiDeprecatedPinmuxMioOutIoc7 = 29 ,   kTopScafiDeprecatedPinmuxMioOutIoc8 = 30 ,   kTopScafiDeprecatedPinmuxMioOutIoc9 = 31 ,   kTopScafiDeprecatedPinmuxMioOutIoc10 = 32 ,   kTopScafiDeprecatedPinmuxMioOutIoc11 = 33 ,   kTopScafiDeprecatedPinmuxMioOutIoc12 = 34 ,   kTopScafiDeprecatedPinmuxMioOutIor0 = 35 ,   kTopScafiDeprecatedPinmuxMioOutIor1 = 36 ,   kTopScafiDeprecatedPinmuxMioOutIor2 = 37 ,   kTopScafiDeprecatedPinmuxMioOutIor3 = 38 ,   kTopScafiDeprecatedPinmuxMioOutIor4 = 39 ,   kTopScafiDeprecatedPinmuxMioOutIor5 = 40 ,   kTopScafiDeprecatedPinmuxMioOutIor6 = 41 ,   kTopScafiDeprecatedPinmuxMioOutIor7 = 42 ,   kTopScafiDeprecatedPinmuxMioOutIor10 = 43 ,   kTopScafiDeprecatedPinmuxMioOutIor11 = 44 ,   kTopScafiDeprecatedPinmuxMioOutIor12 = 45 ,   kTopScafiDeprecatedPinmuxMioOutIor13 = 46 ,   kTopScafiDeprecatedPinmuxMioOutLast = 46 }
	Pinmux MIO Output. More...
enum	top_scafi_deprecated_pinmux_outsel {   kTopScafiDeprecatedPinmuxOutselConstantZero = 0 ,   kTopScafiDeprecatedPinmuxOutselConstantOne = 1 ,   kTopScafiDeprecatedPinmuxOutselConstantHighZ = 2 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio0 = 3 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio1 = 4 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio2 = 5 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio3 = 6 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio4 = 7 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio5 = 8 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio6 = 9 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio7 = 10 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio8 = 11 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio9 = 12 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio10 = 13 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio11 = 14 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio12 = 15 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio13 = 16 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio14 = 17 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio15 = 18 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio16 = 19 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio17 = 20 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio18 = 21 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio19 = 22 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio20 = 23 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio21 = 24 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio22 = 25 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio23 = 26 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio24 = 27 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio25 = 28 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio26 = 29 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio27 = 30 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio28 = 31 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio29 = 32 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio30 = 33 ,   kTopScafiDeprecatedPinmuxOutselGpioGpio31 = 34 ,   kTopScafiDeprecatedPinmuxOutselUart0Tx = 35 ,   kTopScafiDeprecatedPinmuxOutselUart1Tx = 36 ,   kTopScafiDeprecatedPinmuxOutselLast = 36 }
	Pinmux Peripheral Output Selector. More...
enum	top_scafi_deprecated_direct_pads {   kTopScafiDeprecatedDirectPadsSpiHost0Sd0 = 0 ,   kTopScafiDeprecatedDirectPadsSpiHost0Sd1 = 1 ,   kTopScafiDeprecatedDirectPadsSpiHost0Sd2 = 2 ,   kTopScafiDeprecatedDirectPadsSpiHost0Sd3 = 3 ,   kTopScafiDeprecatedDirectPadsSpiDeviceSd0 = 4 ,   kTopScafiDeprecatedDirectPadsSpiDeviceSd1 = 5 ,   kTopScafiDeprecatedDirectPadsSpiDeviceSd2 = 6 ,   kTopScafiDeprecatedDirectPadsSpiDeviceSd3 = 7 ,   kTopScafiDeprecatedDirectPadsUsbdevUsbDp = 8 ,   kTopScafiDeprecatedDirectPadsUsbdevUsbDn = 9 ,   kTopScafiDeprecatedDirectPadsSpiDeviceSck = 10 ,   kTopScafiDeprecatedDirectPadsSpiDeviceCsb = 11 ,   kTopScafiDeprecatedDirectPadsSpiHost0Sck = 12 ,   kTopScafiDeprecatedDirectPadsSpiHost0Csb = 13 ,   kTopScafiDeprecatedDirectPadsLast = 13 }
	Dedicated Pad Selects. More...
enum	top_scafi_deprecated_muxed_pads {   kTopScafiDeprecatedMuxedPadsIoa0 = 0 ,   kTopScafiDeprecatedMuxedPadsIoa1 = 1 ,   kTopScafiDeprecatedMuxedPadsIoa2 = 2 ,   kTopScafiDeprecatedMuxedPadsIoa3 = 3 ,   kTopScafiDeprecatedMuxedPadsIoa4 = 4 ,   kTopScafiDeprecatedMuxedPadsIoa5 = 5 ,   kTopScafiDeprecatedMuxedPadsIoa6 = 6 ,   kTopScafiDeprecatedMuxedPadsIoa7 = 7 ,   kTopScafiDeprecatedMuxedPadsIoa8 = 8 ,   kTopScafiDeprecatedMuxedPadsIob0 = 9 ,   kTopScafiDeprecatedMuxedPadsIob1 = 10 ,   kTopScafiDeprecatedMuxedPadsIob2 = 11 ,   kTopScafiDeprecatedMuxedPadsIob3 = 12 ,   kTopScafiDeprecatedMuxedPadsIob4 = 13 ,   kTopScafiDeprecatedMuxedPadsIob5 = 14 ,   kTopScafiDeprecatedMuxedPadsIob6 = 15 ,   kTopScafiDeprecatedMuxedPadsIob7 = 16 ,   kTopScafiDeprecatedMuxedPadsIob8 = 17 ,   kTopScafiDeprecatedMuxedPadsIob9 = 18 ,   kTopScafiDeprecatedMuxedPadsIob10 = 19 ,   kTopScafiDeprecatedMuxedPadsIob11 = 20 ,   kTopScafiDeprecatedMuxedPadsIob12 = 21 ,   kTopScafiDeprecatedMuxedPadsIoc0 = 22 ,   kTopScafiDeprecatedMuxedPadsIoc1 = 23 ,   kTopScafiDeprecatedMuxedPadsIoc2 = 24 ,   kTopScafiDeprecatedMuxedPadsIoc3 = 25 ,   kTopScafiDeprecatedMuxedPadsIoc4 = 26 ,   kTopScafiDeprecatedMuxedPadsIoc5 = 27 ,   kTopScafiDeprecatedMuxedPadsIoc6 = 28 ,   kTopScafiDeprecatedMuxedPadsIoc7 = 29 ,   kTopScafiDeprecatedMuxedPadsIoc8 = 30 ,   kTopScafiDeprecatedMuxedPadsIoc9 = 31 ,   kTopScafiDeprecatedMuxedPadsIoc10 = 32 ,   kTopScafiDeprecatedMuxedPadsIoc11 = 33 ,   kTopScafiDeprecatedMuxedPadsIoc12 = 34 ,   kTopScafiDeprecatedMuxedPadsIor0 = 35 ,   kTopScafiDeprecatedMuxedPadsIor1 = 36 ,   kTopScafiDeprecatedMuxedPadsIor2 = 37 ,   kTopScafiDeprecatedMuxedPadsIor3 = 38 ,   kTopScafiDeprecatedMuxedPadsIor4 = 39 ,   kTopScafiDeprecatedMuxedPadsIor5 = 40 ,   kTopScafiDeprecatedMuxedPadsIor6 = 41 ,   kTopScafiDeprecatedMuxedPadsIor7 = 42 ,   kTopScafiDeprecatedMuxedPadsIor10 = 43 ,   kTopScafiDeprecatedMuxedPadsIor11 = 44 ,   kTopScafiDeprecatedMuxedPadsIor12 = 45 ,   kTopScafiDeprecatedMuxedPadsIor13 = 46 ,   kTopScafiDeprecatedMuxedPadsLast = 46 }
	Muxed Pad Selects. More...
enum	top_scafi_deprecated_power_manager_wake_ups {   kTopScafiDeprecatedPowerManagerWakeUpsPinmuxAonPinWkupReq = 0 ,   kTopScafiDeprecatedPowerManagerWakeUpsPinmuxAonUsbWkupReq = 1 ,   kTopScafiDeprecatedPowerManagerWakeUpsAonTimerAonWkupReq = 2 ,   kTopScafiDeprecatedPowerManagerWakeUpsLast = 2 }
	Power Manager Wakeup Signals. More...
enum	top_scafi_deprecated_reset_manager_sw_resets {   kTopScafiDeprecatedResetManagerSwResetsSpiDevice = 0 ,   kTopScafiDeprecatedResetManagerSwResetsSpiHost0 = 1 ,   kTopScafiDeprecatedResetManagerSwResetsUsb = 2 ,   kTopScafiDeprecatedResetManagerSwResetsLast = 2 }
	Reset Manager Software Controlled Resets. More...
enum	top_scafi_deprecated_power_manager_reset_requests {   kTopScafiDeprecatedPowerManagerResetRequestsAonTimerAonAonTimerRstReq = 0 ,   kTopScafiDeprecatedPowerManagerResetRequestsLast = 0 }
	Power Manager Reset Request Signals. More...
enum	top_scafi_deprecated_gateable_clocks {   kTopScafiDeprecatedGateableClocksIoDiv4Peri = 0 ,   kTopScafiDeprecatedGateableClocksIoDiv2Peri = 1 ,   kTopScafiDeprecatedGateableClocksIoPeri = 2 ,   kTopScafiDeprecatedGateableClocksUsbPeri = 3 ,   kTopScafiDeprecatedGateableClocksLast = 3 }
	Clock Manager Software-Controlled ("Gated") Clocks. More...
enum	top_scafi_deprecated_hintable_clocks {   kTopScafiDeprecatedHintableClocksMainAes = 0 ,   kTopScafiDeprecatedHintableClocksLast = 0 }
	Clock Manager Software-Hinted Clocks. More...

Variables
const top_scafi_deprecated_plic_peripheral_t	top_scafi_deprecated_plic_interrupt_for_peripheral [88]
	PLIC Interrupt Source to Peripheral Map.

Detailed Description

Top-specific Definitions.

This file contains preprocessor and type definitions for use within the device C/C++ codebase.

These definitions are for information that depends on the top-specific chip configuration, which includes:

• Device Memory Information (for Peripherals and Memory)
• PLIC Interrupt ID Names and Source Mappings
• Pinmux Pin/Select Names
• Power Manager Wakeups

Definition in file top_scafi_deprecated.h.

Macro Definition Documentation

NUM_DIO_PADS

#define NUM_DIO_PADS   14

Definition at line 568 of file top_scafi_deprecated.h.

NUM_MIO_PADS

#define NUM_MIO_PADS   47

Definition at line 567 of file top_scafi_deprecated.h.

PINMUX_MIO_PERIPH_INSEL_IDX_OFFSET

#define PINMUX_MIO_PERIPH_INSEL_IDX_OFFSET   2

Definition at line 563 of file top_scafi_deprecated.h.

PINMUX_PERIPH_OUTSEL_IDX_OFFSET

#define PINMUX_PERIPH_OUTSEL_IDX_OFFSET   3

Definition at line 570 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_AES_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_AES_BASE_ADDR   0x41100000u

Peripheral base address for aes in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 326 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_AES_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_AES_SIZE_BYTES   0x100u

Peripheral size for aes in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_AES_BASE_ADDR and TOP_SCAFI_DEPRECATED_AES_BASE_ADDR + TOP_SCAFI_DEPRECATED_AES_SIZE_BYTES.

Definition at line 336 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_AON_TIMER_AON_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_AON_TIMER_AON_BASE_ADDR   0x40470000u

Peripheral base address for aon_timer_aon in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 236 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_AON_TIMER_AON_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_AON_TIMER_AON_SIZE_BYTES   0x40u

Peripheral size for aon_timer_aon in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_AON_TIMER_AON_BASE_ADDR and TOP_SCAFI_DEPRECATED_AON_TIMER_AON_BASE_ADDR + TOP_SCAFI_DEPRECATED_AON_TIMER_AON_SIZE_BYTES.

Definition at line 246 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_AST_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_AST_BASE_ADDR   0x40480000u

Peripheral base address for ast in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 254 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_AST_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_AST_SIZE_BYTES   0x400u

Peripheral size for ast in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_AST_BASE_ADDR and TOP_SCAFI_DEPRECATED_AST_BASE_ADDR + TOP_SCAFI_DEPRECATED_AST_SIZE_BYTES.

Definition at line 264 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_CLKMGR_AON_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_CLKMGR_AON_BASE_ADDR   0x40420000u

Peripheral base address for clkmgr_aon in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 200 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_CLKMGR_AON_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_CLKMGR_AON_SIZE_BYTES   0x80u

Peripheral size for clkmgr_aon in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_CLKMGR_AON_BASE_ADDR and TOP_SCAFI_DEPRECATED_CLKMGR_AON_BASE_ADDR + TOP_SCAFI_DEPRECATED_CLKMGR_AON_SIZE_BYTES.

Definition at line 210 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_FLASH_CTRL_CORE_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_FLASH_CTRL_CORE_BASE_ADDR   0x41000000u

Peripheral base address for core device on flash_ctrl in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 272 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_FLASH_CTRL_CORE_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_FLASH_CTRL_CORE_SIZE_BYTES   0x200u

Peripheral size for core device on flash_ctrl in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_FLASH_CTRL_CORE_BASE_ADDR and TOP_SCAFI_DEPRECATED_FLASH_CTRL_CORE_BASE_ADDR + TOP_SCAFI_DEPRECATED_FLASH_CTRL_CORE_SIZE_BYTES.

Definition at line 282 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_FLASH_CTRL_MEM_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_FLASH_CTRL_MEM_BASE_ADDR   0x20000000u

Memory base address for mem memory on flash_ctrl in top scafi_deprecated.

Definition at line 396 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_FLASH_CTRL_MEM_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_FLASH_CTRL_MEM_SIZE_BYTES   0x10000u

Memory size for mem memory on flash_ctrl in top scafi_deprecated.

Definition at line 401 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_FLASH_MACRO_WRAPPER_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_FLASH_MACRO_WRAPPER_BASE_ADDR   0x41008000u

Peripheral base address for flash_macro_wrapper in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 290 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_FLASH_MACRO_WRAPPER_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_FLASH_MACRO_WRAPPER_SIZE_BYTES   0x80u

Peripheral size for flash_macro_wrapper in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_FLASH_MACRO_WRAPPER_BASE_ADDR and TOP_SCAFI_DEPRECATED_FLASH_MACRO_WRAPPER_BASE_ADDR + TOP_SCAFI_DEPRECATED_FLASH_MACRO_WRAPPER_SIZE_BYTES.

Definition at line 300 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_GPIO_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_GPIO_BASE_ADDR   0x40040000u

Peripheral base address for gpio in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 74 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_GPIO_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_GPIO_SIZE_BYTES   0x80u

Peripheral size for gpio in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_GPIO_BASE_ADDR and TOP_SCAFI_DEPRECATED_GPIO_BASE_ADDR + TOP_SCAFI_DEPRECATED_GPIO_SIZE_BYTES.

Definition at line 84 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_MMIO_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_MMIO_BASE_ADDR   0x40000000u

MMIO Region.

MMIO region excludes any memory that is separate from the module configuration space, i.e. ROM, main SRAM, and flash are excluded but retention SRAM, spi_device memory, or usbdev memory are included.

Definition at line 902 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_MMIO_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_MMIO_SIZE_BYTES   0x10000000u

Definition at line 903 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_PINMUX_AON_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_PINMUX_AON_BASE_ADDR   0x40460000u

Peripheral base address for pinmux_aon in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 218 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_PINMUX_AON_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_PINMUX_AON_SIZE_BYTES   0x1000u

Peripheral size for pinmux_aon in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_PINMUX_AON_BASE_ADDR and TOP_SCAFI_DEPRECATED_PINMUX_AON_BASE_ADDR + TOP_SCAFI_DEPRECATED_PINMUX_AON_SIZE_BYTES.

Definition at line 228 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_PWRMGR_AON_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_PWRMGR_AON_BASE_ADDR   0x40400000u

Peripheral base address for pwrmgr_aon in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 164 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_PWRMGR_AON_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_PWRMGR_AON_SIZE_BYTES   0x80u

Peripheral size for pwrmgr_aon in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_PWRMGR_AON_BASE_ADDR and TOP_SCAFI_DEPRECATED_PWRMGR_AON_BASE_ADDR + TOP_SCAFI_DEPRECATED_PWRMGR_AON_SIZE_BYTES.

Definition at line 174 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_ROM_CTRL_REGS_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_ROM_CTRL_REGS_BASE_ADDR   0x411E0000u

Peripheral base address for regs device on rom_ctrl in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 362 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_ROM_CTRL_REGS_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_ROM_CTRL_REGS_SIZE_BYTES   0x80u

Peripheral size for regs device on rom_ctrl in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_ROM_CTRL_REGS_BASE_ADDR and TOP_SCAFI_DEPRECATED_ROM_CTRL_REGS_BASE_ADDR + TOP_SCAFI_DEPRECATED_ROM_CTRL_REGS_SIZE_BYTES.

Definition at line 372 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_ROM_CTRL_ROM_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_ROM_CTRL_ROM_BASE_ADDR   0x8000u

Memory base address for rom memory on rom_ctrl in top scafi_deprecated.

Definition at line 416 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_ROM_CTRL_ROM_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_ROM_CTRL_ROM_SIZE_BYTES   0x8000u

Memory size for rom memory on rom_ctrl in top scafi_deprecated.

Definition at line 421 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_RSTMGR_AON_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_RSTMGR_AON_BASE_ADDR   0x40410000u

Peripheral base address for rstmgr_aon in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 182 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_RSTMGR_AON_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_RSTMGR_AON_SIZE_BYTES   0x80u

Peripheral size for rstmgr_aon in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_RSTMGR_AON_BASE_ADDR and TOP_SCAFI_DEPRECATED_RSTMGR_AON_BASE_ADDR + TOP_SCAFI_DEPRECATED_RSTMGR_AON_SIZE_BYTES.

Definition at line 192 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_RV_CORE_IBEX_CFG_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_RV_CORE_IBEX_CFG_BASE_ADDR   0x411F0000u

Peripheral base address for cfg device on rv_core_ibex in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 380 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_RV_CORE_IBEX_CFG_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_RV_CORE_IBEX_CFG_SIZE_BYTES   0x100u

Peripheral size for cfg device on rv_core_ibex in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_RV_CORE_IBEX_CFG_BASE_ADDR and TOP_SCAFI_DEPRECATED_RV_CORE_IBEX_CFG_BASE_ADDR + TOP_SCAFI_DEPRECATED_RV_CORE_IBEX_CFG_SIZE_BYTES.

Definition at line 390 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_RV_PLIC_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_RV_PLIC_BASE_ADDR   0x48000000u

Peripheral base address for rv_plic in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 308 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_RV_PLIC_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_RV_PLIC_SIZE_BYTES   0x8000000u

Peripheral size for rv_plic in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_RV_PLIC_BASE_ADDR and TOP_SCAFI_DEPRECATED_RV_PLIC_BASE_ADDR + TOP_SCAFI_DEPRECATED_RV_PLIC_SIZE_BYTES.

Definition at line 318 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_RV_TIMER_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_RV_TIMER_BASE_ADDR   0x40100000u

Peripheral base address for rv_timer in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 128 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_RV_TIMER_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_RV_TIMER_SIZE_BYTES   0x200u

Peripheral size for rv_timer in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_RV_TIMER_BASE_ADDR and TOP_SCAFI_DEPRECATED_RV_TIMER_BASE_ADDR + TOP_SCAFI_DEPRECATED_RV_TIMER_SIZE_BYTES.

Definition at line 138 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_SPI_DEVICE_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_SPI_DEVICE_BASE_ADDR   0x40050000u

Peripheral base address for spi_device in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 92 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_SPI_DEVICE_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_SPI_DEVICE_SIZE_BYTES   0x2000u

Peripheral size for spi_device in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_SPI_DEVICE_BASE_ADDR and TOP_SCAFI_DEPRECATED_SPI_DEVICE_BASE_ADDR + TOP_SCAFI_DEPRECATED_SPI_DEVICE_SIZE_BYTES.

Definition at line 102 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_SPI_HOST0_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_SPI_HOST0_BASE_ADDR   0x40060000u

Peripheral base address for spi_host0 in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 110 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_SPI_HOST0_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_SPI_HOST0_SIZE_BYTES   0x40u

Peripheral size for spi_host0 in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_SPI_HOST0_BASE_ADDR and TOP_SCAFI_DEPRECATED_SPI_HOST0_BASE_ADDR + TOP_SCAFI_DEPRECATED_SPI_HOST0_SIZE_BYTES.

Definition at line 120 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_RAM_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_RAM_BASE_ADDR   0x10000000u

Memory base address for ram memory on sram_ctrl_main in top scafi_deprecated.

Definition at line 406 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_RAM_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_RAM_SIZE_BYTES   0x20000u

Memory size for ram memory on sram_ctrl_main in top scafi_deprecated.

Definition at line 411 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_REGS_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_REGS_BASE_ADDR   0x411C0000u

Peripheral base address for regs device on sram_ctrl_main in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 344 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_REGS_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_REGS_SIZE_BYTES   0x40u

Peripheral size for regs device on sram_ctrl_main in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_REGS_BASE_ADDR and TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_REGS_BASE_ADDR + TOP_SCAFI_DEPRECATED_SRAM_CTRL_MAIN_REGS_SIZE_BYTES.

Definition at line 354 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_UART0_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_UART0_BASE_ADDR   0x40000000u

Peripheral base address for uart0 in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 38 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_UART0_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_UART0_SIZE_BYTES   0x40u

Peripheral size for uart0 in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_UART0_BASE_ADDR and TOP_SCAFI_DEPRECATED_UART0_BASE_ADDR + TOP_SCAFI_DEPRECATED_UART0_SIZE_BYTES.

Definition at line 48 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_UART1_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_UART1_BASE_ADDR   0x40010000u

Peripheral base address for uart1 in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 56 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_UART1_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_UART1_SIZE_BYTES   0x40u

Peripheral size for uart1 in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_UART1_BASE_ADDR and TOP_SCAFI_DEPRECATED_UART1_BASE_ADDR + TOP_SCAFI_DEPRECATED_UART1_SIZE_BYTES.

Definition at line 66 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_USBDEV_BASE_ADDR

#define TOP_SCAFI_DEPRECATED_USBDEV_BASE_ADDR   0x40320000u

Peripheral base address for usbdev in top scafi_deprecated.

This should be used with mmio_region_from_addr to access the memory-mapped registers associated with the peripheral (usually via a DIF).

Definition at line 146 of file top_scafi_deprecated.h.

TOP_SCAFI_DEPRECATED_USBDEV_SIZE_BYTES

#define TOP_SCAFI_DEPRECATED_USBDEV_SIZE_BYTES   0x1000u

Peripheral size for usbdev in top scafi_deprecated.

This is the size (in bytes) of the peripheral's reserved memory area. All memory-mapped registers associated with this peripheral should have an address between TOP_SCAFI_DEPRECATED_USBDEV_BASE_ADDR and TOP_SCAFI_DEPRECATED_USBDEV_BASE_ADDR + TOP_SCAFI_DEPRECATED_USBDEV_SIZE_BYTES.

Definition at line 156 of file top_scafi_deprecated.h.

Typedef Documentation

top_scafi_deprecated_gateable_clocks_t

typedef enum top_scafi_deprecated_gateable_clocks top_scafi_deprecated_gateable_clocks_t

Clock Manager Software-Controlled ("Gated") Clocks.

The Software has full control over these clocks.

top_scafi_deprecated_hintable_clocks_t

typedef enum top_scafi_deprecated_hintable_clocks top_scafi_deprecated_hintable_clocks_t

Clock Manager Software-Hinted Clocks.

The Software has partial control over these clocks. It can ask them to stop, but the clock manager is in control of whether the clock actually is stopped.

top_scafi_deprecated_plic_irq_id_t

typedef enum top_scafi_deprecated_plic_irq_id top_scafi_deprecated_plic_irq_id_t

PLIC Interrupt Source.

Enumeration of all PLIC interrupt sources. The interrupt sources belonging to the same peripheral are guaranteed to be consecutive.

top_scafi_deprecated_plic_peripheral_t

typedef enum top_scafi_deprecated_plic_peripheral top_scafi_deprecated_plic_peripheral_t

PLIC Interrupt Source Peripheral.

Enumeration used to determine which peripheral asserted the corresponding interrupt.

top_scafi_deprecated_plic_target_t

typedef enum top_scafi_deprecated_plic_target top_scafi_deprecated_plic_target_t

PLIC Interrupt Target.

Enumeration used to determine which set of IE, CC, threshold registers to access for a given interrupt target.

Enumeration Type Documentation

top_scafi_deprecated_direct_pads

enum top_scafi_deprecated_direct_pads

Dedicated Pad Selects.

Definition at line 771 of file top_scafi_deprecated.h.

top_scafi_deprecated_gateable_clocks

enum top_scafi_deprecated_gateable_clocks

Clock Manager Software-Controlled ("Gated") Clocks.

The Software has full control over these clocks.

Enumerator
kTopScafiDeprecatedGateableClocksIoDiv4Peri	Clock clk_io_div4_peri in group peri.
kTopScafiDeprecatedGateableClocksIoDiv2Peri	Clock clk_io_div2_peri in group peri.
kTopScafiDeprecatedGateableClocksIoPeri	Clock clk_io_peri in group peri.
kTopScafiDeprecatedGateableClocksUsbPeri	Clock clk_usb_peri in group peri.

Definition at line 876 of file top_scafi_deprecated.h.

top_scafi_deprecated_hintable_clocks

enum top_scafi_deprecated_hintable_clocks

Clock Manager Software-Hinted Clocks.

The Software has partial control over these clocks. It can ask them to stop, but the clock manager is in control of whether the clock actually is stopped.

Enumerator
kTopScafiDeprecatedHintableClocksMainAes	Clock clk_main_aes in group trans.

Definition at line 890 of file top_scafi_deprecated.h.

top_scafi_deprecated_muxed_pads

enum top_scafi_deprecated_muxed_pads

Muxed Pad Selects.

Definition at line 792 of file top_scafi_deprecated.h.

top_scafi_deprecated_pinmux_insel

enum top_scafi_deprecated_pinmux_insel

Pinmux MIO Input Selector.

Enumerator
kTopScafiDeprecatedPinmuxInselConstantZero	Tie constantly to zero.
kTopScafiDeprecatedPinmuxInselConstantOne	Tie constantly to one.
kTopScafiDeprecatedPinmuxInselIoa0	MIO Pad 0.
kTopScafiDeprecatedPinmuxInselIoa1	MIO Pad 1.
kTopScafiDeprecatedPinmuxInselIoa2	MIO Pad 2.
kTopScafiDeprecatedPinmuxInselIoa3	MIO Pad 3.
kTopScafiDeprecatedPinmuxInselIoa4	MIO Pad 4.
kTopScafiDeprecatedPinmuxInselIoa5	MIO Pad 5.
kTopScafiDeprecatedPinmuxInselIoa6	MIO Pad 6.
kTopScafiDeprecatedPinmuxInselIoa7	MIO Pad 7.
kTopScafiDeprecatedPinmuxInselIoa8	MIO Pad 8.
kTopScafiDeprecatedPinmuxInselIob0	MIO Pad 9.
kTopScafiDeprecatedPinmuxInselIob1	MIO Pad 10.
kTopScafiDeprecatedPinmuxInselIob2	MIO Pad 11.
kTopScafiDeprecatedPinmuxInselIob3	MIO Pad 12.
kTopScafiDeprecatedPinmuxInselIob4	MIO Pad 13.
kTopScafiDeprecatedPinmuxInselIob5	MIO Pad 14.
kTopScafiDeprecatedPinmuxInselIob6	MIO Pad 15.
kTopScafiDeprecatedPinmuxInselIob7	MIO Pad 16.
kTopScafiDeprecatedPinmuxInselIob8	MIO Pad 17.
kTopScafiDeprecatedPinmuxInselIob9	MIO Pad 18.
kTopScafiDeprecatedPinmuxInselIob10	MIO Pad 19.
kTopScafiDeprecatedPinmuxInselIob11	MIO Pad 20.
kTopScafiDeprecatedPinmuxInselIob12	MIO Pad 21.
kTopScafiDeprecatedPinmuxInselIoc0	MIO Pad 22.
kTopScafiDeprecatedPinmuxInselIoc1	MIO Pad 23.
kTopScafiDeprecatedPinmuxInselIoc2	MIO Pad 24.
kTopScafiDeprecatedPinmuxInselIoc3	MIO Pad 25.
kTopScafiDeprecatedPinmuxInselIoc4	MIO Pad 26.
kTopScafiDeprecatedPinmuxInselIoc5	MIO Pad 27.
kTopScafiDeprecatedPinmuxInselIoc6	MIO Pad 28.
kTopScafiDeprecatedPinmuxInselIoc7	MIO Pad 29.
kTopScafiDeprecatedPinmuxInselIoc8	MIO Pad 30.
kTopScafiDeprecatedPinmuxInselIoc9	MIO Pad 31.
kTopScafiDeprecatedPinmuxInselIoc10	MIO Pad 32.
kTopScafiDeprecatedPinmuxInselIoc11	MIO Pad 33.
kTopScafiDeprecatedPinmuxInselIoc12	MIO Pad 34.
kTopScafiDeprecatedPinmuxInselIor0	MIO Pad 35.
kTopScafiDeprecatedPinmuxInselIor1	MIO Pad 36.
kTopScafiDeprecatedPinmuxInselIor2	MIO Pad 37.
kTopScafiDeprecatedPinmuxInselIor3	MIO Pad 38.
kTopScafiDeprecatedPinmuxInselIor4	MIO Pad 39.
kTopScafiDeprecatedPinmuxInselIor5	MIO Pad 40.
kTopScafiDeprecatedPinmuxInselIor6	MIO Pad 41.
kTopScafiDeprecatedPinmuxInselIor7	MIO Pad 42.
kTopScafiDeprecatedPinmuxInselIor10	MIO Pad 43.
kTopScafiDeprecatedPinmuxInselIor11	MIO Pad 44.
kTopScafiDeprecatedPinmuxInselIor12	MIO Pad 45.
kTopScafiDeprecatedPinmuxInselIor13	MIO Pad 46.

Definition at line 617 of file top_scafi_deprecated.h.

top_scafi_deprecated_pinmux_mio_out

enum top_scafi_deprecated_pinmux_mio_out

Pinmux MIO Output.

Enumerator
kTopScafiDeprecatedPinmuxMioOutIoa0	MIO Pad 0.
kTopScafiDeprecatedPinmuxMioOutIoa1	MIO Pad 1.
kTopScafiDeprecatedPinmuxMioOutIoa2	MIO Pad 2.
kTopScafiDeprecatedPinmuxMioOutIoa3	MIO Pad 3.
kTopScafiDeprecatedPinmuxMioOutIoa4	MIO Pad 4.
kTopScafiDeprecatedPinmuxMioOutIoa5	MIO Pad 5.
kTopScafiDeprecatedPinmuxMioOutIoa6	MIO Pad 6.
kTopScafiDeprecatedPinmuxMioOutIoa7	MIO Pad 7.
kTopScafiDeprecatedPinmuxMioOutIoa8	MIO Pad 8.
kTopScafiDeprecatedPinmuxMioOutIob0	MIO Pad 9.
kTopScafiDeprecatedPinmuxMioOutIob1	MIO Pad 10.
kTopScafiDeprecatedPinmuxMioOutIob2	MIO Pad 11.
kTopScafiDeprecatedPinmuxMioOutIob3	MIO Pad 12.
kTopScafiDeprecatedPinmuxMioOutIob4	MIO Pad 13.
kTopScafiDeprecatedPinmuxMioOutIob5	MIO Pad 14.
kTopScafiDeprecatedPinmuxMioOutIob6	MIO Pad 15.
kTopScafiDeprecatedPinmuxMioOutIob7	MIO Pad 16.
kTopScafiDeprecatedPinmuxMioOutIob8	MIO Pad 17.
kTopScafiDeprecatedPinmuxMioOutIob9	MIO Pad 18.
kTopScafiDeprecatedPinmuxMioOutIob10	MIO Pad 19.
kTopScafiDeprecatedPinmuxMioOutIob11	MIO Pad 20.
kTopScafiDeprecatedPinmuxMioOutIob12	MIO Pad 21.
kTopScafiDeprecatedPinmuxMioOutIoc0	MIO Pad 22.
kTopScafiDeprecatedPinmuxMioOutIoc1	MIO Pad 23.
kTopScafiDeprecatedPinmuxMioOutIoc2	MIO Pad 24.
kTopScafiDeprecatedPinmuxMioOutIoc3	MIO Pad 25.
kTopScafiDeprecatedPinmuxMioOutIoc4	MIO Pad 26.
kTopScafiDeprecatedPinmuxMioOutIoc5	MIO Pad 27.
kTopScafiDeprecatedPinmuxMioOutIoc6	MIO Pad 28.
kTopScafiDeprecatedPinmuxMioOutIoc7	MIO Pad 29.
kTopScafiDeprecatedPinmuxMioOutIoc8	MIO Pad 30.
kTopScafiDeprecatedPinmuxMioOutIoc9	MIO Pad 31.
kTopScafiDeprecatedPinmuxMioOutIoc10	MIO Pad 32.
kTopScafiDeprecatedPinmuxMioOutIoc11	MIO Pad 33.
kTopScafiDeprecatedPinmuxMioOutIoc12	MIO Pad 34.
kTopScafiDeprecatedPinmuxMioOutIor0	MIO Pad 35.
kTopScafiDeprecatedPinmuxMioOutIor1	MIO Pad 36.
kTopScafiDeprecatedPinmuxMioOutIor2	MIO Pad 37.
kTopScafiDeprecatedPinmuxMioOutIor3	MIO Pad 38.
kTopScafiDeprecatedPinmuxMioOutIor4	MIO Pad 39.
kTopScafiDeprecatedPinmuxMioOutIor5	MIO Pad 40.
kTopScafiDeprecatedPinmuxMioOutIor6	MIO Pad 41.
kTopScafiDeprecatedPinmuxMioOutIor7	MIO Pad 42.
kTopScafiDeprecatedPinmuxMioOutIor10	MIO Pad 43.
kTopScafiDeprecatedPinmuxMioOutIor11	MIO Pad 44.
kTopScafiDeprecatedPinmuxMioOutIor12	MIO Pad 45.
kTopScafiDeprecatedPinmuxMioOutIor13	MIO Pad 46.

Definition at line 673 of file top_scafi_deprecated.h.

top_scafi_deprecated_pinmux_outsel

enum top_scafi_deprecated_pinmux_outsel

Pinmux Peripheral Output Selector.

Enumerator
kTopScafiDeprecatedPinmuxOutselConstantZero	Tie constantly to zero.
kTopScafiDeprecatedPinmuxOutselConstantOne	Tie constantly to one.
kTopScafiDeprecatedPinmuxOutselConstantHighZ	Tie constantly to high-Z.
kTopScafiDeprecatedPinmuxOutselGpioGpio0	Peripheral Output 0.
kTopScafiDeprecatedPinmuxOutselGpioGpio1	Peripheral Output 1.
kTopScafiDeprecatedPinmuxOutselGpioGpio2	Peripheral Output 2.
kTopScafiDeprecatedPinmuxOutselGpioGpio3	Peripheral Output 3.
kTopScafiDeprecatedPinmuxOutselGpioGpio4	Peripheral Output 4.
kTopScafiDeprecatedPinmuxOutselGpioGpio5	Peripheral Output 5.
kTopScafiDeprecatedPinmuxOutselGpioGpio6	Peripheral Output 6.
kTopScafiDeprecatedPinmuxOutselGpioGpio7	Peripheral Output 7.
kTopScafiDeprecatedPinmuxOutselGpioGpio8	Peripheral Output 8.
kTopScafiDeprecatedPinmuxOutselGpioGpio9	Peripheral Output 9.
kTopScafiDeprecatedPinmuxOutselGpioGpio10	Peripheral Output 10.
kTopScafiDeprecatedPinmuxOutselGpioGpio11	Peripheral Output 11.
kTopScafiDeprecatedPinmuxOutselGpioGpio12	Peripheral Output 12.
kTopScafiDeprecatedPinmuxOutselGpioGpio13	Peripheral Output 13.
kTopScafiDeprecatedPinmuxOutselGpioGpio14	Peripheral Output 14.
kTopScafiDeprecatedPinmuxOutselGpioGpio15	Peripheral Output 15.
kTopScafiDeprecatedPinmuxOutselGpioGpio16	Peripheral Output 16.
kTopScafiDeprecatedPinmuxOutselGpioGpio17	Peripheral Output 17.
kTopScafiDeprecatedPinmuxOutselGpioGpio18	Peripheral Output 18.
kTopScafiDeprecatedPinmuxOutselGpioGpio19	Peripheral Output 19.
kTopScafiDeprecatedPinmuxOutselGpioGpio20	Peripheral Output 20.
kTopScafiDeprecatedPinmuxOutselGpioGpio21	Peripheral Output 21.
kTopScafiDeprecatedPinmuxOutselGpioGpio22	Peripheral Output 22.
kTopScafiDeprecatedPinmuxOutselGpioGpio23	Peripheral Output 23.
kTopScafiDeprecatedPinmuxOutselGpioGpio24	Peripheral Output 24.
kTopScafiDeprecatedPinmuxOutselGpioGpio25	Peripheral Output 25.
kTopScafiDeprecatedPinmuxOutselGpioGpio26	Peripheral Output 26.
kTopScafiDeprecatedPinmuxOutselGpioGpio27	Peripheral Output 27.
kTopScafiDeprecatedPinmuxOutselGpioGpio28	Peripheral Output 28.
kTopScafiDeprecatedPinmuxOutselGpioGpio29	Peripheral Output 29.
kTopScafiDeprecatedPinmuxOutselGpioGpio30	Peripheral Output 30.
kTopScafiDeprecatedPinmuxOutselGpioGpio31	Peripheral Output 31.
kTopScafiDeprecatedPinmuxOutselUart0Tx	Peripheral Output 32.
kTopScafiDeprecatedPinmuxOutselUart1Tx	Peripheral Output 33.

Definition at line 727 of file top_scafi_deprecated.h.

top_scafi_deprecated_pinmux_peripheral_in

enum top_scafi_deprecated_pinmux_peripheral_in

Pinmux Peripheral Input.

Enumerator
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio0	Peripheral Input 0.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio1	Peripheral Input 1.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio2	Peripheral Input 2.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio3	Peripheral Input 3.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio4	Peripheral Input 4.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio5	Peripheral Input 5.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio6	Peripheral Input 6.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio7	Peripheral Input 7.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio8	Peripheral Input 8.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio9	Peripheral Input 9.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio10	Peripheral Input 10.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio11	Peripheral Input 11.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio12	Peripheral Input 12.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio13	Peripheral Input 13.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio14	Peripheral Input 14.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio15	Peripheral Input 15.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio16	Peripheral Input 16.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio17	Peripheral Input 17.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio18	Peripheral Input 18.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio19	Peripheral Input 19.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio20	Peripheral Input 20.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio21	Peripheral Input 21.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio22	Peripheral Input 22.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio23	Peripheral Input 23.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio24	Peripheral Input 24.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio25	Peripheral Input 25.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio26	Peripheral Input 26.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio27	Peripheral Input 27.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio28	Peripheral Input 28.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio29	Peripheral Input 29.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio30	Peripheral Input 30.
kTopScafiDeprecatedPinmuxPeripheralInGpioGpio31	Peripheral Input 31.
kTopScafiDeprecatedPinmuxPeripheralInUart0Rx	Peripheral Input 32.
kTopScafiDeprecatedPinmuxPeripheralInUart1Rx	Peripheral Input 33.
kTopScafiDeprecatedPinmuxPeripheralInUsbdevSense	Peripheral Input 34.

Definition at line 575 of file top_scafi_deprecated.h.

top_scafi_deprecated_plic_irq_id

enum top_scafi_deprecated_plic_irq_id

PLIC Interrupt Source.

Enumeration of all PLIC interrupt sources. The interrupt sources belonging to the same peripheral are guaranteed to be consecutive.

Enumerator
kTopScafiDeprecatedPlicIrqIdNone	No Interrupt.
kTopScafiDeprecatedPlicIrqIdUart0TxWatermark	uart0_tx_watermark
kTopScafiDeprecatedPlicIrqIdUart0RxWatermark	uart0_rx_watermark
kTopScafiDeprecatedPlicIrqIdUart0TxDone	uart0_tx_done
kTopScafiDeprecatedPlicIrqIdUart0RxOverflow	uart0_rx_overflow
kTopScafiDeprecatedPlicIrqIdUart0RxFrameErr	uart0_rx_frame_err
kTopScafiDeprecatedPlicIrqIdUart0RxBreakErr	uart0_rx_break_err
kTopScafiDeprecatedPlicIrqIdUart0RxTimeout	uart0_rx_timeout
kTopScafiDeprecatedPlicIrqIdUart0RxParityErr	uart0_rx_parity_err
kTopScafiDeprecatedPlicIrqIdUart0TxEmpty	uart0_tx_empty
kTopScafiDeprecatedPlicIrqIdUart1TxWatermark	uart1_tx_watermark
kTopScafiDeprecatedPlicIrqIdUart1RxWatermark	uart1_rx_watermark
kTopScafiDeprecatedPlicIrqIdUart1TxDone	uart1_tx_done
kTopScafiDeprecatedPlicIrqIdUart1RxOverflow	uart1_rx_overflow
kTopScafiDeprecatedPlicIrqIdUart1RxFrameErr	uart1_rx_frame_err
kTopScafiDeprecatedPlicIrqIdUart1RxBreakErr	uart1_rx_break_err
kTopScafiDeprecatedPlicIrqIdUart1RxTimeout	uart1_rx_timeout
kTopScafiDeprecatedPlicIrqIdUart1RxParityErr	uart1_rx_parity_err
kTopScafiDeprecatedPlicIrqIdUart1TxEmpty	uart1_tx_empty
kTopScafiDeprecatedPlicIrqIdGpioGpio0	gpio_gpio 0
kTopScafiDeprecatedPlicIrqIdGpioGpio1	gpio_gpio 1
kTopScafiDeprecatedPlicIrqIdGpioGpio2	gpio_gpio 2
kTopScafiDeprecatedPlicIrqIdGpioGpio3	gpio_gpio 3
kTopScafiDeprecatedPlicIrqIdGpioGpio4	gpio_gpio 4
kTopScafiDeprecatedPlicIrqIdGpioGpio5	gpio_gpio 5
kTopScafiDeprecatedPlicIrqIdGpioGpio6	gpio_gpio 6
kTopScafiDeprecatedPlicIrqIdGpioGpio7	gpio_gpio 7
kTopScafiDeprecatedPlicIrqIdGpioGpio8	gpio_gpio 8
kTopScafiDeprecatedPlicIrqIdGpioGpio9	gpio_gpio 9
kTopScafiDeprecatedPlicIrqIdGpioGpio10	gpio_gpio 10
kTopScafiDeprecatedPlicIrqIdGpioGpio11	gpio_gpio 11
kTopScafiDeprecatedPlicIrqIdGpioGpio12	gpio_gpio 12
kTopScafiDeprecatedPlicIrqIdGpioGpio13	gpio_gpio 13
kTopScafiDeprecatedPlicIrqIdGpioGpio14	gpio_gpio 14
kTopScafiDeprecatedPlicIrqIdGpioGpio15	gpio_gpio 15
kTopScafiDeprecatedPlicIrqIdGpioGpio16	gpio_gpio 16
kTopScafiDeprecatedPlicIrqIdGpioGpio17	gpio_gpio 17
kTopScafiDeprecatedPlicIrqIdGpioGpio18	gpio_gpio 18
kTopScafiDeprecatedPlicIrqIdGpioGpio19	gpio_gpio 19
kTopScafiDeprecatedPlicIrqIdGpioGpio20	gpio_gpio 20
kTopScafiDeprecatedPlicIrqIdGpioGpio21	gpio_gpio 21
kTopScafiDeprecatedPlicIrqIdGpioGpio22	gpio_gpio 22
kTopScafiDeprecatedPlicIrqIdGpioGpio23	gpio_gpio 23
kTopScafiDeprecatedPlicIrqIdGpioGpio24	gpio_gpio 24
kTopScafiDeprecatedPlicIrqIdGpioGpio25	gpio_gpio 25
kTopScafiDeprecatedPlicIrqIdGpioGpio26	gpio_gpio 26
kTopScafiDeprecatedPlicIrqIdGpioGpio27	gpio_gpio 27
kTopScafiDeprecatedPlicIrqIdGpioGpio28	gpio_gpio 28
kTopScafiDeprecatedPlicIrqIdGpioGpio29	gpio_gpio 29
kTopScafiDeprecatedPlicIrqIdGpioGpio30	gpio_gpio 30
kTopScafiDeprecatedPlicIrqIdGpioGpio31	gpio_gpio 31
kTopScafiDeprecatedPlicIrqIdSpiDeviceUploadCmdfifoNotEmpty	spi_device_upload_cmdfifo_not_empty
kTopScafiDeprecatedPlicIrqIdSpiDeviceUploadPayloadNotEmpty	spi_device_upload_payload_not_empty
kTopScafiDeprecatedPlicIrqIdSpiDeviceUploadPayloadOverflow	spi_device_upload_payload_overflow
kTopScafiDeprecatedPlicIrqIdSpiDeviceReadbufWatermark	spi_device_readbuf_watermark
kTopScafiDeprecatedPlicIrqIdSpiDeviceReadbufFlip	spi_device_readbuf_flip
kTopScafiDeprecatedPlicIrqIdSpiDeviceTpmHeaderNotEmpty	spi_device_tpm_header_not_empty
kTopScafiDeprecatedPlicIrqIdSpiDeviceTpmRdfifoCmdEnd	spi_device_tpm_rdfifo_cmd_end
kTopScafiDeprecatedPlicIrqIdSpiDeviceTpmRdfifoDrop	spi_device_tpm_rdfifo_drop
kTopScafiDeprecatedPlicIrqIdSpiHost0Error	spi_host0_error
kTopScafiDeprecatedPlicIrqIdSpiHost0SpiEvent	spi_host0_spi_event
kTopScafiDeprecatedPlicIrqIdUsbdevPktReceived	usbdev_pkt_received
kTopScafiDeprecatedPlicIrqIdUsbdevPktSent	usbdev_pkt_sent
kTopScafiDeprecatedPlicIrqIdUsbdevDisconnected	usbdev_disconnected
kTopScafiDeprecatedPlicIrqIdUsbdevHostLost	usbdev_host_lost
kTopScafiDeprecatedPlicIrqIdUsbdevLinkReset	usbdev_link_reset
kTopScafiDeprecatedPlicIrqIdUsbdevLinkSuspend	usbdev_link_suspend
kTopScafiDeprecatedPlicIrqIdUsbdevLinkResume	usbdev_link_resume
kTopScafiDeprecatedPlicIrqIdUsbdevAvOutEmpty	usbdev_av_out_empty
kTopScafiDeprecatedPlicIrqIdUsbdevRxFull	usbdev_rx_full
kTopScafiDeprecatedPlicIrqIdUsbdevAvOverflow	usbdev_av_overflow
kTopScafiDeprecatedPlicIrqIdUsbdevLinkInErr	usbdev_link_in_err
kTopScafiDeprecatedPlicIrqIdUsbdevRxCrcErr	usbdev_rx_crc_err
kTopScafiDeprecatedPlicIrqIdUsbdevRxPidErr	usbdev_rx_pid_err
kTopScafiDeprecatedPlicIrqIdUsbdevRxBitstuffErr	usbdev_rx_bitstuff_err
kTopScafiDeprecatedPlicIrqIdUsbdevFrame	usbdev_frame
kTopScafiDeprecatedPlicIrqIdUsbdevPowered	usbdev_powered
kTopScafiDeprecatedPlicIrqIdUsbdevLinkOutErr	usbdev_link_out_err
kTopScafiDeprecatedPlicIrqIdUsbdevAvSetupEmpty	usbdev_av_setup_empty
kTopScafiDeprecatedPlicIrqIdPwrmgrAonWakeup	pwrmgr_aon_wakeup
kTopScafiDeprecatedPlicIrqIdAonTimerAonWkupTimerExpired	aon_timer_aon_wkup_timer_expired
kTopScafiDeprecatedPlicIrqIdAonTimerAonWdogTimerBark	aon_timer_aon_wdog_timer_bark
kTopScafiDeprecatedPlicIrqIdFlashCtrlProgEmpty	flash_ctrl_prog_empty
kTopScafiDeprecatedPlicIrqIdFlashCtrlProgLvl	flash_ctrl_prog_lvl
kTopScafiDeprecatedPlicIrqIdFlashCtrlRdFull	flash_ctrl_rd_full
kTopScafiDeprecatedPlicIrqIdFlashCtrlRdLvl	flash_ctrl_rd_lvl
kTopScafiDeprecatedPlicIrqIdFlashCtrlOpDone	flash_ctrl_op_done
kTopScafiDeprecatedPlicIrqIdFlashCtrlCorrErr	flash_ctrl_corr_err

Definition at line 450 of file top_scafi_deprecated.h.

top_scafi_deprecated_plic_peripheral

enum top_scafi_deprecated_plic_peripheral

PLIC Interrupt Source Peripheral.

Enumeration used to determine which peripheral asserted the corresponding interrupt.

Enumerator
kTopScafiDeprecatedPlicPeripheralUnknown	Unknown Peripheral.
kTopScafiDeprecatedPlicPeripheralUart0	uart0
kTopScafiDeprecatedPlicPeripheralUart1	uart1
kTopScafiDeprecatedPlicPeripheralGpio	gpio
kTopScafiDeprecatedPlicPeripheralSpiDevice	spi_device
kTopScafiDeprecatedPlicPeripheralSpiHost0	spi_host0
kTopScafiDeprecatedPlicPeripheralUsbdev	usbdev
kTopScafiDeprecatedPlicPeripheralPwrmgrAon	pwrmgr_aon
kTopScafiDeprecatedPlicPeripheralAonTimerAon	aon_timer_aon
kTopScafiDeprecatedPlicPeripheralFlashCtrl	flash_ctrl

Definition at line 430 of file top_scafi_deprecated.h.

top_scafi_deprecated_plic_target

enum top_scafi_deprecated_plic_target

PLIC Interrupt Target.

Enumeration used to determine which set of IE, CC, threshold registers to access for a given interrupt target.

Enumerator
kTopScafiDeprecatedPlicTargetIbex0	Ibex Core 0.

Definition at line 557 of file top_scafi_deprecated.h.

top_scafi_deprecated_power_manager_reset_requests

enum top_scafi_deprecated_power_manager_reset_requests

Power Manager Reset Request Signals.

Definition at line 866 of file top_scafi_deprecated.h.

top_scafi_deprecated_power_manager_wake_ups

enum top_scafi_deprecated_power_manager_wake_ups

Power Manager Wakeup Signals.

Definition at line 846 of file top_scafi_deprecated.h.

top_scafi_deprecated_reset_manager_sw_resets

enum top_scafi_deprecated_reset_manager_sw_resets

Reset Manager Software Controlled Resets.

Definition at line 856 of file top_scafi_deprecated.h.

Variable Documentation

top_scafi_deprecated_plic_interrupt_for_peripheral

const top_scafi_deprecated_plic_peripheral_t top_scafi_deprecated_plic_interrupt_for_peripheral[88]

extern

PLIC Interrupt Source to Peripheral Map.

This array is a mapping from top_scafi_deprecated_plic_irq_id_t to top_scafi_deprecated_plic_peripheral_t.

Definition at line 19 of file top_scafi_deprecated.c.